JPH01118936A - Measurement system for program comprehension rate - Google Patents

Abstract

PURPOSE:To accurately grasp the degree of evaluation of a program to be evaluated by applying a system where the rate is measured for the instructions carried out at least once or more during evaluation of said program. CONSTITUTION:A system comprises an input device 1 which performs the input operations, a program comprehension rate measuring device 2, a CPU 3, a main memory 4, and an output device 5. The executed instruction area information is successively stored in an executing process of a program PR to be evaluated by means of a branch instruction interruption. Then the ratio of the executed instructions of the PR is calculated after execution of the PR based on the stored executed instruction area information. Then the ratio of the number of executed instructions is measured as a program comprehension rate. Thus the degree of evaluation of the PR can be accurately grasped. Furthermore the discrimination is secured between the execute instructions and the unexecuted instructions for output together with the address of an instruction word. Thus it is possible to discriminate a specific unexecuted instruction of the PR.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a method for measuring program coverage in a computer system, and in particular, when a program to be evaluated consisting of a plurality of modules is executed, at least one
This invention relates to a method for measuring the ratio of instructions executed more than once to the total number of instructions.

[Conventional technology]

When a new program is developed, the program is evaluated using test data or the like in order to confirm whether the program achieves its intended purpose.

Normally, when evaluating this program, the person in charge of evaluation evaluates all instructions in the program to be evaluated using 41ilf! We thought of several evaluation items in advance, conducted tests on these evaluation items, and judged that the evaluation was complete when satisfactory results were obtained for all evaluation items.

(Problem to be solved by the invention) However, it is extremely difficult to think of evaluation items in advance that can cover all the instructions in the program to be evaluated, and therefore it is extremely difficult to think of evaluation items in advance that can cover all the instructions in the program to be evaluated. There was a problem in that it could not be said that the evaluation of the target program had been completed.

The present invention has been made in view of these circumstances,
The purpose of this is to provide a method for measuring the ratio of instructions executed at least once during the evaluation of a program to be evaluated, thereby making it possible to accurately determine the degree of evaluation of the program to be evaluated. .

[Means for solving problems]

In order to achieve the above object, the present invention executes a branch instruction in a program in response to the setting of a branch instruction interrupt mode, and sets a pre-branch address and a post-branch address before the first instruction after the branch is executed. In a computer system that has a branch instruction interrupt mechanism that maintains a branch instruction and generates an internal interrupt, a computer system that is composed of one or more modules existing in main memory and that stores the module's information at the beginning of every module based on an absolute address. Search for the evaluation target program to which the module name initial identifier indicating the beginning and including the module name is added, and search for the module destination of the module including the absolute address! II module search means for obtaining another word; address conversion means for converting an absolute address into a module name and an intra-module relative address based on the module head identifier obtained by the module search means; post-branch address storage means for storing; executed instruction area information storage means; pre-branch address held in the branch instruction interrupt mechanism when an internal interrupt occurs by the branch instruction interrupt mechanism; and post-branch address storage. The range indicated by the post-branch address stored in the means is stored as executed instruction area information in the executed instruction area information storage means, and the post-branch address held in the branch instruction interrupt mechanism is stored as executed instruction area information. Coverage rate measurement control means for storing in address storage means, instruction word analysis means for obtaining addresses of all instruction words of the evaluation target program on main memory, and all instructions of the evaluation target program obtained by the instruction word analysis means. Based on the address of the word and the executed instruction area information stored in the executed instruction area information storage means, the ratio of executed instructions in the program to be evaluated is determined by program #.
141r! At the same time, the address of the instruction word is calculated as a ratio and outputted from the output device, and the address of the instruction word is converted into a module name and an intra-module relative address by the address conversion means so that executed instructions and unexecuted instructions can be distinguished. and a measurement result editing/output control means for outputting from the measurement result editing/output control means.

[Effect]

When a branch instruction in the program to be evaluated is executed, the branch instruction interrupt mechanism holds the pre-branch address and post-branch address and generates an internal interrupt. When this internal interrupt occurs, the 'am rate measurement control means calculates the range indicated by the pre-branch address held in the branch instruction interrupt mechanism and the previous post-branch address stored in the post-branch address storage means. The executed instruction area information is stored in the executed instruction area information storage means, and the post-branch address currently held by the branch instruction interrupt mechanism is stored in the post-branch address storage means. Such processing is performed every time a branch instruction in the program to be evaluated is executed, and as a result,
When the execution of the evaluation target program ends, information indicating the area of executed instructions in the area of the evaluation target program is stored in the executed instruction area information storage means. After that, the measurement result editing output control section uses the addresses of all the instruction words of the evaluation target program obtained from the instruction word analysis means,
Based on the executed instruction area information stored in the executed instruction area information storage means, the ratio of executed instructions in the evaluation target program is calculated as a program coverage rate, and executed instructions and unexecuted instructions are identified. The address of the instruction word converted into a module name and an intra-module relative address by the address conversion means is output from the output device.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the program coverage measurement method of the present invention. , a central processing unit 3, a main storage device 4, and an output device 5.

In the central processing unit 3, in response to the setting of the branch instruction interrupt mode including the specification of the priority level during program execution,
A branch that maintains the priority level, pre-branch address, and post-branch address and generates an internal interrupt by executing a branch instruction in the program with the specified priority level, before the first instruction after the minute is executed. An instruction interrupt mechanism 30 is provided. The program coverage measuring device 2 also includes an input information analysis section 20, a y4 vehicle side fixed control section 21, a post-branch address storage section 22 that can store post-branch addresses for each priority level, and an executed instruction area. It has an information storage section 23, a measurement result editing output control section 24, a command analysis section 25, a coverage calculation section 26, a module search section 27, and an address conversion section 28.

The main storage device 4 includes a plurality of modules 41.42°...
There is an evaluation target program PR consisting of modules 41, 42, 4n, and 4n. ..., 4
n(7) The first address is 31. S2. . . , the Sn address, and the ending address is El, E2 . ...,E
It is address n. Then, the start address S of each module
1, S2. ..., Sn indicates the beginning of the module and the corresponding module name (aa
Module head identification words 41M, 42M, . . . , 4nM including aaa+bbbbb+”+nnnnn) are added.

Note that the priority level of the evaluation target program PR during program running is (1).

Next, the operation of the program coverage measurement method of this embodiment configured as described above will be explained.

In this embodiment, the program coverage rates of multiple evaluation target programs existing in the main storage device 4 can be measured individually, and the coverage rates of multiple evaluation target programs with different priority levels can also be measured simultaneously. can. Assume now that the program coverage rate of one evaluation target program PR is to be measured. In this case, the priority level (
1) is notified to the M4 vehicle side constant control section 21.

Upon receiving this notification, the coverage measurement control unit 21 sets the priority level [11 to the branch instruction interrupt mode and activates the branch instruction interrupt mechanism 30, and also sets the branch instruction interrupt mechanism 30 to the branch address storage unit 22 corresponding to the priority level fi+. Initialize the rear address to zero. Thereafter, the evaluation target program PR in the main storage device 4 is started.

When a branch instruction is executed during execution of the evaluation target program PR, the branch instruction interrupt mechanism 30 of the central processing unit 3 receives the running priority level (1) 1 post-branch address.

The pre-branch address is held, a branch instruction interrupt is generated at the branch destination address, and the coverage measurement control unit 21 of the program coverage measurement device 2 is operated.

The coverage measurement control unit 21 converts the priority level (1) held in the branch instruction interrupt mechanism 30, the pre-branch address which is the address of the branch instruction itself, and the post-branch address which is the branch destination of this branch instruction into a branch instruction. Received from the interrupt 11t130, the range from the post-branch address corresponding to the priority level 111 in the post-branch address storage unit 22 to the pre-branch address received this time is stored in the executed instruction area information storage unit 23 as executed instruction area information. At the same time, the currently received post-branch address is stored in the area within the post-branch address storage unit 22 corresponding to the currently received priority level (1). Note that, at the time of the first branch instruction interrupt in which the post-branch address in the post-branch address storage unit 22 corresponding to the priority level number is initialized to zero, the w4-side setting control unit 21 interrupts the branch instruction interrupt mechanism 30. The post-branch address notified from the branch address is only stored in the post-branch address storage unit 22 in correspondence with the current priority level, and the executed instruction area information is not stored in the executed instruction area information storage unit 23. After performing 0 or more operations, the coverage rate measurement control unit 21 instructs the branch instruction interrupt mechanism 30 to resume execution from the post-branch address in the evaluation target program PR, and waits for the next branch instruction interrupt.

FIG. 2 explains the operation when storing executed instruction area information in the executed instruction area information storage section 23, taking as an example the routine from address PO to address P4 of one module 41 that constitutes the evaluation target program PR. This is a diagram. In module 41, addresses Po, pi, p
2. P3. P4 is the branch destination address (post-branch address) of the branch instruction, and addresses B1, B2 . B3. B4 is the address of the branch instruction itself (pre-branch address). First, when a branch instruction that branches to address PO of the module 41 is executed, a branch instruction interrupt is generated by the branch instruction interrupt mechanism 30, and the coverage rate is measured. The control unit 21 operates. m
The vehicle-side measurement control unit 21 stores the post-branch address PO notified from the branch instruction interrupt mechanism 30 in the post-branch address storage unit 22 in correspondence with the priority level (11) (here, the address PO before branching to the address Po (The explanation of the procedure for storing executed instruction area information is omitted.)

Next, when the branch instruction at address B1 of the module 41 is executed and a branch instruction interrupt occurs at address P1, which is the branch destination, the coverage measurement control unit 21 receives the pre-branch address notified from the branch instruction interrupt mechanism 30. The range between Bl and the address Po stored in correspondence with the priority level +1) in the post-branch address storage unit 22 at this time is stored in the executed instruction area information M.
1 in the executed instruction area information storage unit 23, and then the post-branch address P1 notified together with the pre-branch address B1 is set to the priority level +11 of the post-branch address storage unit 22.
Store in the corresponding location. Similarly, address B2. B3.
By executing the branch instruction B4, addresses P2, P3, . A branch instruction interrupt occurs at P4, and the l1IIi rate measurement control unit 21 updates each executed instruction area information M2.
．． M3. M4 is stored in the executed instruction area information storage section 23.

FIG. 3 is a diagram showing an example of the stored contents of the executed instruction area information storage section 23. As shown in FIG. The executed instruction area information storage unit 23 of this embodiment has a focus corresponding to each address in the main memory on an I-to-I basis. The bit corresponds to address 100 on the main memory.

Then, the bit of the bit number corresponding to the address of the executed method instruction is turned on, and the bit corresponding to the address of the unexecuted instruction is turned off.
1 as an example, its starting address on main memory is 31.
Since the end address is address E1, is it the executed instruction of module 41? The il area information is bit number S1 to bit number E of the executed instruction area information storage unit 23 in FIG.
1 is stored in the storage area 23-1. The executed instruction area information storage area 23-1 stores executed instruction area information M1. M2. M3. M4 exists and executed instruction area information Ml, M2 . M3. All bits contained in M4 are on. Similarly, bits corresponding to other executed instruction areas of the module 41 in the executed instruction area information storage area 23-1 are also stored as executed instruction area information M1, M2. M3. Like M4, it is on, and the other pinpoints, that is, the bits corresponding to unexecuted instruction areas of the module 41, are off.

Now, in FIG. 1, after the execution of the evaluation target program PR is completed, a branch instruction interrupt mode release command of priority level f1) is notified from the input device 1 to the coverage measurement control section 21 via the input information analysis section 20. and coverage measurement control section 2
1 cancels the branch instruction interrupt mode of the priority level (1) and stops the branch instruction interrupt mechanism 30, and also edits the measurement results so as to edit and output the measurement results for the evaluation target program PR of the priority level (1). Instruct the output control section 24.

Upon receiving this instruction, the measurement result editing output control section 24 instructs the instruction word analysis section 25 to report the addresses of all instruction words from address 81 to address En. In response to this, the instruction word analysis section 25 interprets all the instruction words from address 31 to En address and sequentially reports the addresses of all instruction words to the measurement result editing output control section 24.

When the instruction word address is reported from the instruction word analysis section 25, the measurement result editing output control section 24 edits the bit based on the reported address and the state of the bit in the executed instruction area information storage section 23. Only addresses for which OFF is selected, that is, addresses of unexecuted instructions, are selected as addresses to be output. This selected address is an absolute address, and as described later, the module search section 27 and address conversion section 28 are used to convert the absolute address into a module name and an intra-module relative address, and output them from the output device 5. do.

Furthermore, the measurement result editing output control section 24 controls the instruction word analysis section 2.
5 counts the number of instruction words that are sequentially reported, and also counts the number of times that the bit of the executed instruction area information storage unit corresponding to the address of the reported instruction word is on, that is, the number of execution method instruction words. Finally, based on these count values, the coverage calculation unit 26 calculates the ratio of the number of execution method command words to the total number of command words. mti rate calculation unit 2
6 calculates, for example, the number of execution method command words divided by the total number of command words in the form of a percentage, based on the above count value, and notifies the measurement result editing output control section 24 . The measurement result editing output control unit 24 outputs this calculation result to the output device 5 as a program coverage rate for the evaluation target program 41.

Next, we will explain the operation when converting an absolute address into a module name and an intra-module relative address, assuming that the module 41
The start address S1 of the module is 1000, and the module 42
Assuming that the start address S2 of the file is address 1500, an example will be explained in which the absolute address address 1234 is to be converted.

The measurement result editing output control unit 24 uses the absolute address 1234
When converting an address, the absolute address 1234 is notified to the module search unit 27 and a search is instructed.

When this search instruction is given, module search section 2
7, in order to find the start address of the module that includes the absolute address 1234, the address is decreased one by one from address 1234 and the module start identification word is searched.

As a result, the module destination of module 41 starts from address 31 (1000 in the current example)! ! ! Identification word 41M is found first. When the module search unit 27 finds the module header identification word 41M, its header address Sl
and the module header identification word 41M are notified to the measurement result editing output control section 24.

Next, the measurement result editing output control section 24 transfers the absolute address 1234 along with the notified contents to the address conversion section 24.
In response, the address conversion unit 28 issues a conversion instruction to the module destination N identification word 41M.
Extracts the module name (aaaaa) from within, calculates the relative address within the module 234 (-1234-31) from the start address S1 and the absolute address 1234, and notifies this to the measurement result editing output control unit 24. .

The measurement result editing output control unit 24 performs the above processing,
This is repeated for all absolute addresses of unexecuted instructions.

The program coverage rate of the evaluation target program PR and the intra-module relative address and module name of unexecuted instructions obtained as described above are edited by the measurement result editing output control unit 24, and then are shown in FIG. 4, for example. It is output from the output device 5 in the format shown.

The above operation is an example of measuring the coverage rate of one evaluation target program, but in this embodiment, the post-branch address storage unit 22
Since post-branch addresses can be stored for each priority level, by specifying multiple priority levels from the input device 1, it is possible to simultaneously measure program coverage, etc. for evaluation target programs with multiple different priority levels. be. At this time, after the execution of the plurality of evaluation target programs is completed, branch instruction interrupt mode release commands of a plurality of priority levels are input from the input device 1, so that the coverage measurement control unit 21 sequentially covers the program of each evaluation target program. This controls the calculation process of the rate and unexecuted instruction address.

〔Effect of the invention〕

As explained above, the present invention uses branch instruction interrupts to sequentially store executed instruction area information during the execution process of the evaluation target program, and after the execution of the evaluation target program is completed, the executed instruction area information is stored in the stored executed instruction area. Based on the information, the ratio of executed instructions of the program to be evaluated is calculated, without any modification to the program to be evaluated.
Program the ratio of the number of execution method instructions! It can be measured as a 1ull rate. Therefore, it is possible to accurately grasp the evaluation level of the program to be evaluated.

In addition to outputting the ratio of the number of execution method instructions of the program to be evaluated, we also output the address of the instruction word so that executed instructions and unexecuted instructions can be distinguished. It is possible to determine whether the command is an unexecuted instruction, etc.

Therefore, in the next evaluation step, it is possible to perform evaluation focusing on unexecuted instructions, and it is possible to efficiently (improve the degree of evaluation of the program).

Furthermore, the address of an unexecuted instruction is output in a format converted into a module name and a relative address within the module, so after searching for the start address of the module from the address map output by the linker, the relative address within the module is output. There is no need for manual calculation, and unexecuted instructions can be identified more easily and accurately.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is an explanatory diagram of the operation when storing executed instruction area information in the executed instruction area information storage section 23, and FIG. 3 is an executed instruction area information storage FIG. 4 is a diagram showing an example of the storage contents of the unit 23, and FIG. 4 is a diagram showing an example of output of measurement results. In the figure: 1... Input device 2... Program! IL vehicle side measuring device 3...Central processing unit 4...Main storage device 5...Output device 20...Input information analysis section 21...'fi4 rate measurement rate measurement control section 22 Address after branching Storage unit 23...Executed instruction area information storage unit 24...Measurement result editing output control unit 25...Instruction word analysis unit 26...Coverage rate calculation unit 27...Module search unit 28... Address translation unit 30...Branch instruction interrupt mechanism 41-4n...Module PR...Evaluation target program

Claims (1)

[Claims] In response to the branch instruction interrupt mode setting, by executing a branch instruction in the program, the pre-branch address and post-branch address are held and internally stored before the first instruction after the branch is executed. In a computer system having a branch instruction interrupt mechanism that generates an interrupt, the module is composed of one or more modules existing in main memory based on an absolute address, and the beginning of the module is indicated at the beginning of all modules. module search means for searching an evaluation target program to which a module header identifier including a name is added, and obtaining the module header identifier of a module including the absolute address; and the module header identifier obtained by the module search means. address conversion means for converting an absolute address into a module name and an intra-module relative address based on the branch address; post-branch address storage means for storing the post-branch address; executed instruction area information storage means; and the branch instruction interrupt. When an internal interrupt occurs by the branch instruction interrupt mechanism, the range indicated by the pre-branch address held in the branch instruction interrupt mechanism and the post-branch address stored in the post-branch address storage means is used as executed instruction area information to store the executed instruction. coverage measurement control means for storing in the instruction area information storage means and the post-branch address held in the branch instruction interrupt mechanism in the post-branch address storage means; instruction word analysis means for obtaining the addresses of instruction words; addresses of all instruction words of the evaluation target program obtained by the instruction word analysis means; and executed instruction area information stored in the executed instruction area information storage means. Based on this, the ratio of executed instructions in the program to be evaluated is calculated as the program coverage rate and outputted from the output device. A method for measuring program coverage rate, comprising: a relative address within a module; and a measurement result editing/output control means for outputting an address of a command word converted into an intra-module relative address from the output device.