JPH04257934A - System for measuring comprehensive rate of program - Google Patents

Abstract

PURPOSE:To freely interrupt/continue evaluation and to efficiently execute the evaluation by efficiently improving the quality of a program without working the objective program of the evaluation, and cumulatively storing comprehension information in an external storage device. CONSTITUTION:The above system is composed of an input device 1, program comprehensive rate measuring device 2, central processing unit 3 equipped with a branching instruction interrupting mechanism 30, main storage device 4 to store the objective program of evaluation, output device 5 and external storage device 6 having a cumulative file to cumulatively store contents from a comprehension information storage part 23. When a branching instruction is executed for branching to an address PO of a program 41, branching instruction interruption is generated by the branching instruction interrupting mechanism 30, and a comprehensive rate measurement control part 21. Further, an informed branched address P1 is stored in a branched address storage part 22 corresponding to a priority level number 1.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for measuring program coverage in an information processing system, and more particularly to a method for measuring the ratio of instructions executed at least once in a program to be evaluated.

0002

BACKGROUND OF THE INVENTION Conventionally, as a measure of the degree of evaluation of a program, evaluation items for a program to be evaluated are listed in advance, and the evaluation is completed after all of the evaluation items have been verified.

0003

[Problems to be Solved by the Invention] In the above program evaluation, (1) creation of evaluation items often relies on individual experience and intuition, and there are individual differences in the degree of debugging; (2)
) As a program grows larger, problems arise such as it becomes difficult to list all evaluation items, and it is expected that some parts will not be evaluated.

0004

[Means for Solving the Problems] The program coverage measurement method of the present invention determines the running priority level of the program including the branch instruction and the pre-branch address before the first instruction after the branch is executed by executing the branch instruction. (the address of the branch instruction itself; the same applies hereinafter) and the post-branch address (the branch destination address of the branch instruction; the same applies below) and generates an internal interrupt, and this internal interrupt can be generated for each of one or more of the priority levels. branch instruction interrupt means, branch instruction interrupt mode setting/cancellation means for starting and stopping the branch instruction interrupt means, and a post-branch address for storing the post-branch address in correspondence with the priority level. a range indicated by a storage means, the pre-branch address notified from the branch instruction interrupt means, and the post-branch address already stored by the post-branch address storage means and corresponding to the priority level at the time of the branch instruction interrupt; comprehensive information storage means for storing as comprehensive information; instruction word analysis means for obtaining the addresses of all instruction words of the program to be evaluated on main memory; and the addresses of the instruction words obtained by the instruction word analysis means and the comprehensive information. Measurement result editing output that calculates the ratio of executed instructions (program coverage rate) from the coverage information stored in the storage means and edits and outputs the address of the instruction word so that executed instructions and unexecuted instructions can be distinguished. and a control means for cumulatively storing the exhaustive information stored in the exhaustive information storage means in an external storage device.

Further, the branch instruction interrupt means is provided in the central processing unit, and includes the branch instruction interrupt mode setting/cancellation means, the post-branch address storage means, the exhaustive information storage means, the instruction word analysis means, and the measurement means. A result editing output means and the control means are provided in the program coverage measuring device.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings.

FIG. 1 shows the configuration of an embodiment of the program coverage measurement method of the present invention. The system for measuring program coverage of this embodiment includes an input device 1 on which input operations are performed, an input information analysis section 20, and a coverage measurement control section 21.
, a post-branch address storage section 22 , a coverage information storage section 23 , a measurement result editing output control section 24 , an instruction word analysis section 25 , a coverage calculation section 26 , and a cumulative file input/output control section 27 . and a central processing unit 3 including a branch instruction interrupt mechanism 30 that holds a priority level, a pre-branch address, and a post-branch address and generates an internal interrupt before the first instruction after the branch is executed by executing the branch instruction. and,
A main storage device 4 that stores the evaluation target program, an output device 5 that outputs a measurement result list, and a comprehensive information storage section 2
3, and an external storage device 6 in which a cumulative file exists for cumulatively storing the contents from 3 onwards. There are evaluation target programs 41, 42, ..., 4n in the main storage device 4, and their start addresses are S1, S2, ..., S
It is represented by address n, and the end address is E0, E1,...
..., is represented as an address En. The priority levels of the evaluation target programs 41, 42, . . . , 4n are 1, 2, . . . , n, respectively.

In such a configuration, when measuring the evaluation target program 41, a branch instruction interrupt mode setting command for priority level number 1 is sent from the input device 1 via the input information analysis section 20 of the program coverage measurement device 2. ,
The coverage rate measurement control unit 21 is notified. Upon receiving this notification, the coverage measurement control unit 21 refers to the branch instruction interrupt mode status for each priority level internally managed by the branch instruction interrupt mechanism 30, and determines whether the branch instruction interrupt mode is currently being executed at another priority level. Only when branch instruction interrupt mode is not being executed at another priority level, comprehensive information storage of the contents of the cumulative file in the external storage device 6 is made to the cumulative file input/output control unit 27. Instructs the unit 23 to return to the original state. Upon receiving this command, the cumulative file input/output control unit 27 that has completed the recovery moves the coverage rate measurement control unit 21
A return completion notification will be sent. After this, the coverage measurement control section 2
1 instructs the branch instruction interrupt mechanism 30 to set priority level number 1 to branch instruction interrupt mode, and initializes the post-branch address in the post-branch address storage unit 22 corresponding to priority level number 1 to zero. . After this, main memory 4
When the evaluation target program 41 is started and a branch instruction is executed, the branch instruction interrupt mechanism 30 of the central processing unit 3 generates a branch instruction interrupt at the branch destination address, and the program coverage measuring device 2 The coverage measurement control unit 21 is operated. The coverage measurement control unit 21 is a branch instruction interrupt mechanism 3
0 indicates priority level number 1 and evaluation target program 4.
The pre-branch address, which is the address of the branch instruction itself in No. 1, and the post-branch address, which is the branch destination of this branch instruction, are received. The range up to the pre-branch address notified at the time of the branch instruction interrupt is stored as comprehensive information in the coverage information storage unit 23, and the post-branch address notified at the time of the branch instruction interrupt is associated with priority level number 1 and the range is stored after the branch. It is stored in the address storage section 22. Note that the coverage measurement control unit 21 uses priority level number 1.
At the time of the first branch instruction interrupt in which the post-branch address in the post-branch address storage unit 22 corresponding to the post-branch address is initialized to zero, the post-branch address notified from the branch instruction interrupt mechanism 30 is made to correspond to the priority level number 1. The branch address storage unit 22 only stores the comprehensive information in the post-branch address storage unit 22, and the comprehensive information is not stored in the comprehensive information storage unit 23. After performing the above operations, the coverage measurement control unit 21 executes the evaluation target program 4.
It instructs the branch instruction interrupt mechanism 30 to resume execution from the address after branching at step 1, and waits for the next branch instruction interrupt.

FIG. 2 is a related diagram when comprehensive information is stored in the comprehensive information storage section 23, taking as an example the routine from address P0 to address P4 of the evaluation target program 41. In the evaluation target program 41, address P0
, P1, P2, P3, and P4 are the branch destination addresses of the branch instructions, and addresses B1, B2, B3, and B4 are the addresses of the branch instructions themselves. First, when a branch instruction to branch to address P0 of the evaluation target program 41 is executed, a branch instruction interrupt is generated by the branch instruction interrupt mechanism 30, and the coverage rate measurement control section 21 operates. Coverage rate measurement control unit 21
stores the post-branch address P0 notified from the branch instruction interrupt mechanism 30 in the post-branch address storage unit 22 in correspondence with the priority level number 1 (Here, the procedure for storing exhaustive information before branching to address P0 will be explained. ). next,
A branch instruction at address B1 of the evaluation target program 41 is executed, and a branch instruction interrupt occurs at address P1, which is the branch destination. At this time, the coverage measurement control unit 21 receives the pre-branch address B1 notified from the branch instruction interrupt mechanism 30,
At this time, the range with the address PP0 (from address P0 to address B1) stored in the post-branch address storage unit 22 is stored in the comprehensive information storage unit 23 as comprehensive information M1, and the notified post-branch address P1 is given priority. It is stored in the post-branch address storage unit 22 in correspondence with level number 1. Similarly, by executing the branch instructions at addresses B2, B3, and B4, branch instruction interrupts occur at addresses P2, P3, and P4, respectively, and the coverage measurement control unit 21 converts the coverage information M2, M3, and M4 into coverage information. Storage section 23
is memorized.

FIG. 3 shows an example of the contents stored in the comprehensive information storage section 23. The comprehensive information storage section 23 adopts a method of storing addresses in bit units. In other words, address 0 → bit number 0
, address 100→bit number 100, and the address of the executed instruction has the corresponding bit turned on. Therefore, the start address of the evaluation target program 41 on the main memory is S.
1 and the end address is address E1, the comprehensive information of the evaluation target program 41 is the comprehensive information 23M stored in the range from bit number S1 to bit number E1 of the comprehensive information storage unit 23. The coverage information 23M includes the coverage information M1, M2, M3, and M4 shown in the explanation in FIG. 2, and all bits included in the coverage information M1, M2, M3, and M4 are on. Further, in the coverage information 23M, like the coverage information M1, M2, M3, and M4, the bit corresponding to the instruction area executed in the evaluation target program 41 is stored as being turned on.

When the evaluation is completed, a branch instruction interrupt mode cancellation command for priority level number 1 is notified from the input device 1 to the coverage measurement control section 21 via the input information analysis section 20. Upon receiving this notification, the control unit 21 refers to the branch instruction interrupt mode status for each priority level that is internally managed by the branch instruction interrupt mechanism 30, and determines whether or not the branch instruction interrupt mode is being executed at another priority level. The cumulative file input/output control unit 27 sends the contents of the comprehensive information storage unit 23 to the cumulative file of the external storage device 6 only when the branch instruction interrupt mode is not being executed at another priority level. Order them to evacuate. Upon receiving this directive,
The cumulative file input/output control unit 27 that has completed the save notifies the coverage rate measurement control unit 21 that the save has been completed. After that, the coverage measurement control unit 21 instructs the branch instruction interrupt mechanism 30 to cancel the branch instruction interrupt mode of priority level number 1, and also instructs the measurement result to edit and output the measurement results for the evaluation target program 41. The editing output control unit 24 is instructed. Measurement result editing output control section 24 that received this instruction
instructs the instruction word analysis unit 25 to report the addresses of all instruction words from address S1 to address E1. The instruction word analysis section 25 interprets all the instruction words from the S1 address to the E1 address and sequentially reports the addresses of all the instruction words to the measurement result editing output control section 24. Thereafter, when the measurement result editing output control section 24 outputs the address of the instruction word sequentially reported by the instruction word analysis section 25 to the output device 5, the measurement result editing output control section 24 outputs the address of the instruction word sequentially reported by the instruction word analysis section 25 to the comprehensive information storage section 23 corresponding to the address of the instruction word reported. Outputs only the addresses of unexecuted instructions whose bits are off. Furthermore, the measurement result editing output control section 24 can know the number of executed instructions and the total number of instructions from the addresses of instruction words successively reported by the instruction word analysis section 25 and the comprehensive information storage section 23. It instructs the coverage rate calculation unit 26 to calculate the ratio of the number of completed instruction words to the total number of instruction words, and outputs this calculation result to the output device 5 as the program coverage rate for the evaluation target program 41.

Note that since the post-branch address in the post-branch address storage unit 22 can be stored in correspondence with the priority level, the program to be evaluated 4 running at the priority level 1 described above
It is possible to measure not only one priority level but also multiple priority levels simultaneously.

Furthermore, it is determined whether or not the branch instruction interrupt mode is being executed at another priority level by referring to the branch instruction interrupt mode status for each priority level that is internally managed by the branch instruction interrupt mechanism 30. However, the branch instruction interrupt mode status for each priority level may be configured in the program coverage measuring device 2. Alternatively, the comprehensive information may be configured to be classified by priority level, so that it is not necessary to determine whether or not the branch instruction interrupt mode is being executed at other priority levels.

Furthermore, in this embodiment, when a branch instruction interrupt mode release command is input from the input device 1, the measurement results are edited and output, but since the comprehensive information is saved in the cumulative file, This may also be the case when a command to edit and output the measurement results is input from the input device 1.

[0015]

As explained above, according to the present invention, exhaustive information is stored using branch instruction interrupts, and after the program to be evaluated is executed, the number of executed instructions is calculated based on the stored exhaustive information. A ratio (program coverage rate) can be calculated, and thereby the degree of program coverage can be objectively determined, and the quality measure of the program can be standardized regardless of years of experience. Furthermore, by outputting the addresses of unexecuted instructions, evaluation can be performed focusing on unexecuted instructions in the next evaluation step. In this way, the quality of the program can be efficiently improved without modifying the program to be evaluated. Furthermore, since comprehensive information is cumulatively stored in an external storage device, evaluation can be interrupted and continued freely, and evaluation can be performed efficiently.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram showing an embodiment of the present invention.

FIG. 2 is a diagram illustrating an operation when comprehensive information is stored in a comprehensive information storage unit.

FIG. 3 is a diagram illustrating an example of storage contents of a comprehensive information storage unit.

[Explanation of symbols]

1 Input device 2 Program coverage measurement device 3 Central processing unit 4 Main memory 5 Output device 6 External storage device

Claims (2)

[Claims] 1. Before the first instruction after the branch is executed by executing the branch instruction, the execution priority level of the program including the branch instruction, the pre-branch address, and the post-branch address are held, and an internal interrupt is generated. and branch instruction interrupt means for generating this internal interrupt for each of one or more of the priority levels, branch instruction interrupt mode setting/cancellation means for starting and stopping the branch instruction interrupt means, and a post-branch address storage means for storing the post-branch address in correspondence with the priority level; and a post-branch address that is notified from the branch instruction interrupt means and a post-branch address already stored by the post-branch address storage means and which is already stored in the branch instruction interrupt. comprehensive information storage means for storing as comprehensive information the range indicated by the post-branch address corresponding to the priority level at the time; instruction word analysis means for obtaining the addresses of all instruction words of the evaluation target program on main memory; The ratio of executed instructions is calculated from the address of the instruction word obtained by the instruction word analysis means and the exhaustive information stored by the exhaustive information storage means, and the executed instructions and unexecuted instructions can be distinguished. A program coverage measurement method comprising: measurement result editing and outputting means for editing and outputting word addresses; and control means for cumulatively storing coverage information stored in the coverage information storage means in an external storage device. 2. The branch instruction interrupt means is provided in a central processing unit, and includes the branch instruction interrupt mode setting/cancellation means, the post-branch address storage means, the exhaustive information storage means, the instruction word analysis means, and the measurement means. 2. The program coverage measuring method according to claim 1, wherein the result editing output means and the control means are provided in a program coverage measuring device.