JPH01113485U - - Google Patents

Info

Publication number
JPH01113485U
JPH01113485U JP730188U JP730188U JPH01113485U JP H01113485 U JPH01113485 U JP H01113485U JP 730188 U JP730188 U JP 730188U JP 730188 U JP730188 U JP 730188U JP H01113485 U JPH01113485 U JP H01113485U
Authority
JP
Japan
Prior art keywords
package
circuits
synchronization
highway
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP730188U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP730188U priority Critical patent/JPH01113485U/ja
Publication of JPH01113485U publication Critical patent/JPH01113485U/ja
Pending legal-status Critical Current

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  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は本考案の一実施例を示す構
成図、第3図は従来の一例を示す図である。 1,2……加入者線インターフエース装置、1
0……加入者インターフエース回路、20〜23
,40〜45……加入者回路パツケージ、30,
50……多重化整合回路、31,51……FIF
Oレジスタ、32,52……ゲート回路、33,
34,53,54……オア回路。
1 and 2 are block diagrams showing one embodiment of the present invention, and FIG. 3 is a diagram showing a conventional example. 1, 2...Subscriber line interface device, 1
0...Subscriber interface circuit, 20 to 23
,40-45...Subscriber circuit package, 30,
50...Multiple matching circuit, 31, 51...FIF
O register, 32, 52...gate circuit, 33,
34, 53, 54...OR circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] N回路分の加入者回路を実装した第1のパツケ
ージとM(NはMの整数倍)回路分の加入者回路
を実装した第2のパツケージとを混載し、前記第
1のパツケージに対して規則性を持つて1枚のパ
ツケージを未実装とし、上りハイウエイ信号につ
いては前記第1のパツケージに対応する同期クロ
ツクに同期して特定の4回路分のハイウエイ信号
をそのまま送出しかつ他の4回路分のハイウエイ
信号を一旦蓄積して前記第1のパツケージと規則
性を持つ前記未実装状態のパツケージに対応する
同期クロツクに同期して送出し、下りハイウエイ
信号については前記第1のパツケージと規則性を
持つ未実装状態のパツケージに対応する同期クロ
ツクに同期して特定の4回路分のハイウエイ信号
を一旦蓄積し前記第1のパツケージに対応する同
期クロツクに同期して前記第1のパツケージの他
の4回路に一旦蓄積したハイウエイ信号を送り込
むことを特徴とする加入者線インターフエース装
置。
A first package on which subscriber circuits for N circuits are mounted and a second package on which subscriber circuits for M circuits (N is an integer multiple of M) are mounted together, and Due to the regularity, one package is left unmounted, and for uplink highway signals, the highway signals for four specific circuits are sent out as they are in synchronization with the synchronization clock corresponding to the first package, and the other four circuits are The downlink highway signals are once stored and sent out in synchronization with the synchronized clock corresponding to the unmounted package that has the regularity of the first package, and the downlink highway signal has the regularity of the first package. The highway signals for four specific circuits are temporarily stored in synchronization with the synchronization clock corresponding to the unmounted package, and the highway signals of the other circuits in the first package are A subscriber line interface device characterized by sending highway signals once accumulated to four circuits.
JP730188U 1988-01-22 1988-01-22 Pending JPH01113485U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP730188U JPH01113485U (en) 1988-01-22 1988-01-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP730188U JPH01113485U (en) 1988-01-22 1988-01-22

Publications (1)

Publication Number Publication Date
JPH01113485U true JPH01113485U (en) 1989-07-31

Family

ID=31212196

Family Applications (1)

Application Number Title Priority Date Filing Date
JP730188U Pending JPH01113485U (en) 1988-01-22 1988-01-22

Country Status (1)

Country Link
JP (1) JPH01113485U (en)

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