JPS60189154U - Loop check circuit of data transmission equipment - Google Patents
Loop check circuit of data transmission equipmentInfo
- Publication number
- JPS60189154U JPS60189154U JP1984075166U JP7516684U JPS60189154U JP S60189154 U JPS60189154 U JP S60189154U JP 1984075166 U JP1984075166 U JP 1984075166U JP 7516684 U JP7516684 U JP 7516684U JP S60189154 U JPS60189154 U JP S60189154U
- Authority
- JP
- Japan
- Prior art keywords
- data
- loop check
- data transmission
- transmission equipment
- check circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図はデータ伝送装置の従来のループチェック回路の
ブロック回路図、第2図はこの考案の実施例に係るルー
プチェック回路のブロック回路図である。
1・・・送信部、2・・・受信部、112・・・第1の
レジスタ、120・・・第2のレジスタ、130・・・
不一致検出回路、21・・・レジスタ。FIG. 1 is a block circuit diagram of a conventional loop check circuit of a data transmission device, and FIG. 2 is a block circuit diagram of a loop check circuit according to an embodiment of this invention. DESCRIPTION OF SYMBOLS 1... Transmission part, 2... Receiving part, 112... First register, 120... Second register, 130...
Mismatch detection circuit, 21... register.
Claims (1)
伝送装置において、前記送信部1は、前記受信部2に伝
送すべきデータD工の先頭の複数ビットに配置されるル
ープチェックデータD。を一時的に記憶するループチェ
ックデータ用の第1のレジスタ112と、前記伝送すべ
きデータD1と異に前記受信部2に送出されたのち該受
信部2から戻されてくる前記ループチェックデータD0
を入力して該ループチェックデータD。を一時的に記憶
するループチェックデータ用の第2のレジスタ120と
、前記第1および第2のレジスタ112.120の記憶
内容の不一致を検出する不一致 −検出回路130と
を有することを特徴とするデータ伝送装置のループチェ
ック回路。In a data transmission device that transmits data Di') from a transmitting section 1 to a receiving section 2, the transmitting section 1 transmits loop check data D arranged at the first bits of data D to be transmitted to the receiving section 2. a first register 112 for loop check data that temporarily stores the data D1 to be transmitted; and the loop check data D0 that is sent to the receiver 2 and then returned from the receiver 2, unlike the data D1 to be transmitted.
Input the loop check data D. The present invention is characterized by having a second register 120 for loop check data that temporarily stores the above, and a mismatch detection circuit 130 that detects a mismatch between the stored contents of the first and second registers 112 and 120. Loop check circuit for data transmission equipment.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984075166U JPS60189154U (en) | 1984-05-24 | 1984-05-24 | Loop check circuit of data transmission equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984075166U JPS60189154U (en) | 1984-05-24 | 1984-05-24 | Loop check circuit of data transmission equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60189154U true JPS60189154U (en) | 1985-12-14 |
Family
ID=30616133
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1984075166U Pending JPS60189154U (en) | 1984-05-24 | 1984-05-24 | Loop check circuit of data transmission equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60189154U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62122432A (en) * | 1985-11-22 | 1987-06-03 | Sharp Corp | Error check system in serial data transfer |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4941045A (en) * | 1972-08-26 | 1974-04-17 | ||
JPS513505A (en) * | 1974-06-27 | 1976-01-13 | Oki Electric Ind Co Ltd |
-
1984
- 1984-05-24 JP JP1984075166U patent/JPS60189154U/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4941045A (en) * | 1972-08-26 | 1974-04-17 | ||
JPS513505A (en) * | 1974-06-27 | 1976-01-13 | Oki Electric Ind Co Ltd |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62122432A (en) * | 1985-11-22 | 1987-06-03 | Sharp Corp | Error check system in serial data transfer |
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