JPS62143345U - - Google Patents

Info

Publication number
JPS62143345U
JPS62143345U JP3237086U JP3237086U JPS62143345U JP S62143345 U JPS62143345 U JP S62143345U JP 3237086 U JP3237086 U JP 3237086U JP 3237086 U JP3237086 U JP 3237086U JP S62143345 U JPS62143345 U JP S62143345U
Authority
JP
Japan
Prior art keywords
biphasic
waveform
code
sending circuit
sending
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3237086U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3237086U priority Critical patent/JPS62143345U/ja
Publication of JPS62143345U publication Critical patent/JPS62143345U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本考案の一実施例を示す回路図、第
2図は、同実施例における各信号波形を示すタイ
ミングチヤート、第3図は、従来の一般的なデイ
ジタルデータの通信系を示すブロツク図、第4図
は、同通信系における各信号波形を示すタイミン
グチヤートである。 11,12…シフトレジスタ、13,14…バ
ツフア、15…コンパレータ。
Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2 is a timing chart showing each signal waveform in the same embodiment, and Fig. 3 is a conventional general digital data communication system. The block diagram in FIG. 4 is a timing chart showing each signal waveform in the communication system. 11, 12...Shift register, 13, 14...Buffer, 15...Comparator.

Claims (1)

【実用新案登録請求の範囲】 デイジタルデータをバイフエイスコードに変換
して送出するバイフエイズコード送出回路におい
て、 バイフエイズ波形を反転して遅延させた波形を
得る手段と、 該手段で得られた波形と前記バイフアイズ波形
とを合成して送出波形を作成する手段とを具備す
ることを特徴とするバイフエイズコード送出回路
[Claims for Utility Model Registration] In a biphasic code sending circuit that converts digital data into a biphasic code and transmits the biphasic code, means for obtaining a waveform obtained by inverting and delaying a biphasic waveform, and a waveform obtained by the means. A biphasic code sending circuit comprising: means for synthesizing the biphasic waveform with the biphasic waveform to create a sending waveform.
JP3237086U 1986-03-05 1986-03-05 Pending JPS62143345U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3237086U JPS62143345U (en) 1986-03-05 1986-03-05

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3237086U JPS62143345U (en) 1986-03-05 1986-03-05

Publications (1)

Publication Number Publication Date
JPS62143345U true JPS62143345U (en) 1987-09-10

Family

ID=30838981

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3237086U Pending JPS62143345U (en) 1986-03-05 1986-03-05

Country Status (1)

Country Link
JP (1) JPS62143345U (en)

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