JPS59166520U - Receiving machine - Google Patents

Receiving machine

Info

Publication number
JPS59166520U
JPS59166520U JP5930583U JP5930583U JPS59166520U JP S59166520 U JPS59166520 U JP S59166520U JP 5930583 U JP5930583 U JP 5930583U JP 5930583 U JP5930583 U JP 5930583U JP S59166520 U JPS59166520 U JP S59166520U
Authority
JP
Japan
Prior art keywords
receiving machine
capacitor
diode
recorded
changing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5930583U
Other languages
Japanese (ja)
Inventor
寺田 俊雄
久 伊藤
成毛 豊
Original Assignee
日本テクニカル株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本テクニカル株式会社 filed Critical 日本テクニカル株式会社
Priority to JP5930583U priority Critical patent/JPS59166520U/en
Publication of JPS59166520U publication Critical patent/JPS59166520U/en
Pending legal-status Critical Current

Links

Landscapes

  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図面は本案の実施例で図中1は第2のコンデンサ、2は
コイル、3は第1のコンデンサ、4はダイオード、5,
6は微調整用のコンデンサ、7はスイッチである。
The drawing shows an example of the present invention, in which 1 is a second capacitor, 2 is a coil, 3 is a first capacitor, 4 is a diode, 5,
6 is a capacitor for fine adjustment, and 7 is a switch.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 第1のコンデンサとダイオードとを並列に接続した回路
を第2のコンデンサに直列接続し、前記ダイオードに印
加する電圧の変化により受信バンドを選択することを特
徴とする受信機。
A receiver characterized in that a circuit in which a first capacitor and a diode are connected in parallel is connected in series to a second capacitor, and a reception band is selected by changing the voltage applied to the diode.
JP5930583U 1983-04-20 1983-04-20 Receiving machine Pending JPS59166520U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5930583U JPS59166520U (en) 1983-04-20 1983-04-20 Receiving machine

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5930583U JPS59166520U (en) 1983-04-20 1983-04-20 Receiving machine

Publications (1)

Publication Number Publication Date
JPS59166520U true JPS59166520U (en) 1984-11-08

Family

ID=30189556

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5930583U Pending JPS59166520U (en) 1983-04-20 1983-04-20 Receiving machine

Country Status (1)

Country Link
JP (1) JPS59166520U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5132252A (en) * 1974-09-13 1976-03-18 Fujitsu Ltd JIDORITOKUSEIGYOJOTAIKENCHIKAIRO

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5132252A (en) * 1974-09-13 1976-03-18 Fujitsu Ltd JIDORITOKUSEIGYOJOTAIKENCHIKAIRO

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