JPH01108940U - - Google Patents
Info
- Publication number
- JPH01108940U JPH01108940U JP271088U JP271088U JPH01108940U JP H01108940 U JPH01108940 U JP H01108940U JP 271088 U JP271088 U JP 271088U JP 271088 U JP271088 U JP 271088U JP H01108940 U JPH01108940 U JP H01108940U
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- chip
- utility
- sealed
- model
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 239000011347 resin Substances 0.000 claims description 2
- 229920005989 resin Polymers 0.000 claims description 2
- 239000004020 conductor Substances 0.000 claims 1
- 229910000679 solder Inorganic materials 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図ないし第５図は本考案によるＩＣボード
の実施例を示す概略的断面図である。
１，１２…合成シリカ基板、２…２５６Ｋビツ
トＤＲＡＭのベヤチツプ、７，８，１０…樹脂、
９…シリカ基板。
1 to 5 are schematic sectional views showing an embodiment of an IC board according to the present invention. 1, 12... Synthetic silica substrate, 2... 256K bit DRAM bare chip, 7, 8, 10... Resin,
9...Silica substrate.
Claims (1)
し、該ＩＣチツプは、その電極部に予め形成され
た半田バンプによつて上記基板の導体部に接続さ
れてなるＩＣボードにおいて、 上記基板はシリカ基板であり、上記ＩＣチツプ
は気密封止又は弾性率が５００Kgｆ／mm2以下の
樹脂で封止されていることを特徴とするＩＣボー
ド。[Claims for Utility Model Registration] A utility model comprising a substrate and an IC chip mounted on the substrate, the IC chip being connected to the conductor portion of the substrate by solder bumps formed in advance on the electrode portions of the IC chip. An IC board characterized in that the substrate is a silica substrate, and the IC chip is hermetically sealed or sealed with a resin having an elastic modulus of 500 Kgf/mm 2 or less.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP271088U JPH01108940U (en) | 1988-01-13 | 1988-01-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP271088U JPH01108940U (en) | 1988-01-13 | 1988-01-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01108940U true JPH01108940U (en) | 1989-07-24 |
Family
ID=31203715
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP271088U Pending JPH01108940U (en) | 1988-01-13 | 1988-01-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01108940U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100467897B1 (en) * | 1996-12-24 | 2005-01-24 | 닛토덴코 가부시키가이샤 | A semiconductor device and a process for the production thereof |
-
1988
- 1988-01-13 JP JP271088U patent/JPH01108940U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100467897B1 (en) * | 1996-12-24 | 2005-01-24 | 닛토덴코 가부시키가이샤 | A semiconductor device and a process for the production thereof |
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