JPS60163751U - semiconductor equipment - Google Patents
semiconductor equipmentInfo
- Publication number
- JPS60163751U JPS60163751U JP4949584U JP4949584U JPS60163751U JP S60163751 U JPS60163751 U JP S60163751U JP 4949584 U JP4949584 U JP 4949584U JP 4949584 U JP4949584 U JP 4949584U JP S60163751 U JPS60163751 U JP S60163751U
- Authority
- JP
- Japan
- Prior art keywords
- conductive layer
- semiconductor device
- package
- semiconductor equipment
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案の一実施例を示す斜視図、第2図及び第
3図はそれぞれ本考案の他の実施例を示 □す斜視図で
ある。
1・・・リード線、1e・・・GNDピン、2・・・パ
ック 4、−ジ本体、3・・・導電層、3・・・I
Cの型式名などの゛抜き文字。FIG. 1 is a perspective view showing one embodiment of the present invention, and FIGS. 2 and 3 are perspective views showing other embodiments of the present invention, respectively. 1... Lead wire, 1e... GND pin, 2... Pack 4, -ji body, 3... Conductive layer, 3... I
Excluded characters in C model names, etc.
Claims (4)
ジに導電層を形成したごとを特徴とする半導体装置。(1) A semiconductor device characterized in that a conductive layer is formed in a package so as to surround a DIP type IC chip.
の範囲第1項記載の半導体装置。(2) The semiconductor device according to claim 1, wherein the conductive layer is connected to the GND pin.
の範囲第1項または第2項記載の半導体装置。(3) A semiconductor device according to claim 1 or 2 of the utility model registration claim, in which a conductive layer is bonded to a package.
名などを抜き文字によって表記した実用新案登録請求の
範囲第1項または第2項記載の半導体装置。(4) The semiconductor device according to claim 1 or 2, wherein a conductive layer is adhered to the outer surface of the package, and a model name and the like are written on the conductive layer in cut-out letters.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4949584U JPS60163751U (en) | 1984-04-04 | 1984-04-04 | semiconductor equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4949584U JPS60163751U (en) | 1984-04-04 | 1984-04-04 | semiconductor equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60163751U true JPS60163751U (en) | 1985-10-30 |
Family
ID=30566754
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4949584U Pending JPS60163751U (en) | 1984-04-04 | 1984-04-04 | semiconductor equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60163751U (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6327096U (en) * | 1986-08-06 | 1988-02-22 | ||
JPS6426899U (en) * | 1987-08-07 | 1989-02-15 | ||
JP2019054216A (en) * | 2017-09-19 | 2019-04-04 | 東芝メモリ株式会社 | Semiconductor device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5030478A (en) * | 1973-07-17 | 1975-03-26 | ||
JPS58122759A (en) * | 1982-01-14 | 1983-07-21 | Fujitsu Ltd | Semiconductor device |
-
1984
- 1984-04-04 JP JP4949584U patent/JPS60163751U/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5030478A (en) * | 1973-07-17 | 1975-03-26 | ||
JPS58122759A (en) * | 1982-01-14 | 1983-07-21 | Fujitsu Ltd | Semiconductor device |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6327096U (en) * | 1986-08-06 | 1988-02-22 | ||
JPS6426899U (en) * | 1987-08-07 | 1989-02-15 | ||
JP2019054216A (en) * | 2017-09-19 | 2019-04-04 | 東芝メモリ株式会社 | Semiconductor device |
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