JPS6146736U - Semiconductor chip mounting structure - Google Patents

Semiconductor chip mounting structure

Info

Publication number
JPS6146736U
JPS6146736U JP1984132596U JP13259684U JPS6146736U JP S6146736 U JPS6146736 U JP S6146736U JP 1984132596 U JP1984132596 U JP 1984132596U JP 13259684 U JP13259684 U JP 13259684U JP S6146736 U JPS6146736 U JP S6146736U
Authority
JP
Japan
Prior art keywords
semiconductor chip
mounting structure
chip mounting
lead terminal
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984132596U
Other languages
Japanese (ja)
Inventor
和也 原
健治 陸名
Original Assignee
カシオ計算機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by カシオ計算機株式会社 filed Critical カシオ計算機株式会社
Priority to JP1984132596U priority Critical patent/JPS6146736U/en
Priority to US06/766,759 priority patent/US4727246A/en
Publication of JPS6146736U publication Critical patent/JPS6146736U/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Wire Bonding (AREA)
  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図ないし第４図はこの考案をＩＣカードに適用した
場合の一実施例を示し、第１図はＩＣカードの外観斜視
図、第２図はその分解斜視図、第３図はＩＣモジュール
の分解斜視区、第４図は第１図の■−ＶＩ線断面図、第
５図は変形例を示す断面図である。 ３・・・・・・接点部、訃・・・・・半導体チップ、９
・・・・・・基板、１３・・・・・・金属箔、１３ａ・
・・・・・リード端子。Figures 1 to 4 show an example in which this invention is applied to an IC card. Figure 1 is an external perspective view of the IC card, Figure 2 is an exploded perspective view of the IC card, and Figure 3 is an IC module. FIG. 4 is a sectional view taken along the line ■-VI in FIG. 1, and FIG. 5 is a sectional view showing a modified example. 3...Contact part, end...Semiconductor chip, 9
...Substrate, 13...Metal foil, 13a.
...Lead terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基板に設けられた金属箔をエッチングしてリード端子と
接点部とを一体に形成し、このリード端子にＩＣ−ＬＳ
Ｉ等の半導体チップをボンディングしたことを特徴とす
る半導体トップの取付構造。The lead terminal and the contact part are integrally formed by etching the metal foil provided on the board, and the IC-LS is attached to the lead terminal.
A semiconductor top mounting structure characterized by bonding a semiconductor chip such as I.
JP1984132596U 1984-08-31 1984-08-31 Semiconductor chip mounting structure Pending JPS6146736U (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP1984132596U JPS6146736U (en) 1984-08-31 1984-08-31 Semiconductor chip mounting structure
US06/766,759 US4727246A (en) 1984-08-31 1985-08-16 IC card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984132596U JPS6146736U (en) 1984-08-31 1984-08-31 Semiconductor chip mounting structure

Publications (1)

Publication Number Publication Date
JPS6146736U true JPS6146736U (en) 1986-03-28

Family

ID=30691157

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984132596U Pending JPS6146736U (en) 1984-08-31 1984-08-31 Semiconductor chip mounting structure

Country Status (1)

Country Link
JP (1) JPS6146736U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001084347A (en) * 1999-09-16 2001-03-30 Toshiba Corp Card-type storage device and its manufacture

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58209133A (en) * 1982-05-14 1983-12-06 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン Electrically connecting method and personal card utilizing same

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58209133A (en) * 1982-05-14 1983-12-06 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン Electrically connecting method and personal card utilizing same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001084347A (en) * 1999-09-16 2001-03-30 Toshiba Corp Card-type storage device and its manufacture

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