JPH01108629U - - Google Patents
Info
- Publication number
- JPH01108629U JPH01108629U JP341588U JP341588U JPH01108629U JP H01108629 U JPH01108629 U JP H01108629U JP 341588 U JP341588 U JP 341588U JP 341588 U JP341588 U JP 341588U JP H01108629 U JPH01108629 U JP H01108629U
- Authority
- JP
- Japan
- Prior art keywords
- data
- bit
- clock pulse
- error correction
- outputs
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 230000000630 rising effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Error Detection And Correction (AREA)
Description
第１図は本考案回路を構成する符号器の一例を
示す構成説明図、第２図は同じく復号器の一例を
示す構成説明図、第３図は本考案回路における符
号器の作用説明図、第４図は同じく復号器の作用
説明図である。
１……変換テーブル、２……パルス発生器、３
，４……第１、第２レジスタ、５……変換テーブ
ル、Ａ……Ｋビツトの入力データ、Ｂ……クロツ
クパルス、Ｃ……Ｎ／２ビツトの誤り訂正符号デ
ータ、Ｄ，Ｅ……第１、第２クロツクパルス、Ｆ
１，Ｆ２……データ、Ｘ……Ｎビツトの出力デー
タ、Ｙ，Ａ……Ｋビツトのデータ。
FIG. 1 is a configuration explanatory diagram showing an example of an encoder constituting the circuit of the present invention, FIG. 2 is a configuration explanatory diagram showing an example of a decoder, and FIG. 3 is an explanatory diagram of the operation of the encoder in the circuit of the present invention. FIG. 4 is also an explanatory diagram of the operation of the decoder. 1...Conversion table, 2...Pulse generator, 3
, 4...first and second registers, 5...conversion table, A...K-bit input data, B...clock pulse, C...N/2-bit error correction code data, D, E...th... 1. Second clock pulse, F
1 , F2 ...data, X...N-bit output data, Y, A...K-bit data.
Claims (1)
入力してＮ／２ビツトの誤り訂正符号データＣに
変換し出力する変換テーブル１と、クロツクパル
スＢの立ち上りと立ち下りでそれぞれ第１、第２
クロツクパルスＤ，Ｅを発生して出力するパルス
発生器２と、前記Ｎ／２ビツトの誤り訂正符号デ
ータＣを入力し前記第１、第２クロツクパルスＤ
，ＥでそれぞれクロツクパルスＢが１レベルのと
きと０レベルのときの状態に対するデータを書き
込み各第１、第２クロツクパルスＤ，Ｅの１周期
毎に出力するデータＦ１，Ｆ２よりなるＮビツト
の出力データＸを出力する第１、第２レジスタ３
，４とよりなる符号器と、Ｎビツトの出力データ
ＸとクロツクパルスＢを入力しＫビツト（Ｋ＜Ｎ
）のデータＹを検索して出力する変換テーブル５
よりなる復号器として構成された誤り訂正回路。 Conversion table 1 inputs K-bit input data A and clock pulse B, converts it into N/2-bit error correction code data C, and outputs the first and second data at the rising and falling edges of clock pulse B, respectively.
A pulse generator 2 generates and outputs clock pulses D and E, and receives the N/2 bit error correction code data C and outputs the first and second clock pulses D.
, E write data for the states when the clock pulse B is at the 1 level and at the 0 level, respectively. First and second registers 3 that output output data X
, 4, N-bit output data X and clock pulse B are input, and K-bit (K<N
) Conversion table 5 to search and output data Y
An error correction circuit configured as a decoder consisting of:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP341588U JPH01108629U (en) | 1988-01-13 | 1988-01-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP341588U JPH01108629U (en) | 1988-01-13 | 1988-01-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01108629U true JPH01108629U (en) | 1989-07-24 |
Family
ID=31205030
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP341588U Pending JPH01108629U (en) | 1988-01-13 | 1988-01-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01108629U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5625850A (en) * | 1979-08-09 | 1981-03-12 | Matsushita Electric Ind Co Ltd | Decoding method |
| JPS5625851A (en) * | 1979-08-09 | 1981-03-12 | Matsushita Electric Ind Co Ltd | Coding method |
-
1988
- 1988-01-13 JP JP341588U patent/JPH01108629U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5625850A (en) * | 1979-08-09 | 1981-03-12 | Matsushita Electric Ind Co Ltd | Decoding method |
| JPS5625851A (en) * | 1979-08-09 | 1981-03-12 | Matsushita Electric Ind Co Ltd | Coding method |
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