JPS5625850A - Decoding method - Google Patents

Decoding method

Info

Publication number
JPS5625850A
JPS5625850A JP10187279A JP10187279A JPS5625850A JP S5625850 A JPS5625850 A JP S5625850A JP 10187279 A JP10187279 A JP 10187279A JP 10187279 A JP10187279 A JP 10187279A JP S5625850 A JPS5625850 A JP S5625850A
Authority
JP
Japan
Prior art keywords
code
error correction
information
correction code
memory element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10187279A
Other languages
Japanese (ja)
Inventor
Hidekazu Tsuboka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP10187279A priority Critical patent/JPS5625850A/en
Publication of JPS5625850A publication Critical patent/JPS5625850A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Error Detection And Correction (AREA)

Abstract

PURPOSE:To enable the conversion of error correction code into information code at high speed, by storing the rule of conversion in the memory element such as ROM. CONSTITUTION:The error correction code 10 in n bits is input to the memory element 9 such as ROM by taking this code 10 as address. The memory information element 9 stores the code in K bits (K<n) converting the code 10 into the information code 11 at the address location with the error correction code 10. Accordingly, when the memory element 1 is addressed at the error correction code 10, the information code 11 is output. If there is any error in the error correction code 10, the information code corresponding to the error correction code near in the humming interval is read out. This invension is effective for the shorter code length.
JP10187279A 1979-08-09 1979-08-09 Decoding method Pending JPS5625850A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10187279A JPS5625850A (en) 1979-08-09 1979-08-09 Decoding method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10187279A JPS5625850A (en) 1979-08-09 1979-08-09 Decoding method

Publications (1)

Publication Number Publication Date
JPS5625850A true JPS5625850A (en) 1981-03-12

Family

ID=14312064

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10187279A Pending JPS5625850A (en) 1979-08-09 1979-08-09 Decoding method

Country Status (1)

Country Link
JP (1) JPS5625850A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01108629U (en) * 1988-01-13 1989-07-24

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01108629U (en) * 1988-01-13 1989-07-24

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