JP7433250B2 - 記憶装置 - Google Patents

記憶装置 Download PDF

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Publication number
JP7433250B2
JP7433250B2 JP2020568868A JP2020568868A JP7433250B2 JP 7433250 B2 JP7433250 B2 JP 7433250B2 JP 2020568868 A JP2020568868 A JP 2020568868A JP 2020568868 A JP2020568868 A JP 2020568868A JP 7433250 B2 JP7433250 B2 JP 7433250B2
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Japan
Prior art keywords
insulator
oxide
layer
conductor
transistor
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JP2020568868A
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Japanese (ja)
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JPWO2020157558A1 (ja
JPWO2020157558A5 (ja
Inventor
修平 長塚
達也 大貫
貴彦 石津
清 加藤
舜平 山崎
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Publication of JPWO2020157558A1 publication Critical patent/JPWO2020157558A1/ja
Publication of JPWO2020157558A5 publication Critical patent/JPWO2020157558A5/ja
Priority to JP2024016208A priority Critical patent/JP7568878B2/ja
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Publication of JP7433250B2 publication Critical patent/JP7433250B2/ja
Priority to JP2024173977A priority patent/JP7745059B2/ja
Priority to JP2025152725A priority patent/JP2025178310A/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/471—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having different architectures, e.g. having both top-gate and bottom-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4094—Bit-line management or control circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/70—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733—Multi-gate TFTs
    • H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Dram (AREA)
JP2020568868A 2019-01-29 2019-11-22 記憶装置 Active JP7433250B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2024016208A JP7568878B2 (ja) 2019-01-29 2024-02-06 半導体装置
JP2024173977A JP7745059B2 (ja) 2019-01-29 2024-10-03 半導体装置
JP2025152725A JP2025178310A (ja) 2019-01-29 2025-09-12 記憶装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2019013469 2019-01-29
JP2019013469 2019-01-29
PCT/IB2019/060053 WO2020157558A1 (ja) 2019-01-29 2019-11-22 記憶装置、半導体装置、および、電子機器

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2024016208A Division JP7568878B2 (ja) 2019-01-29 2024-02-06 半導体装置

Publications (3)

Publication Number Publication Date
JPWO2020157558A1 JPWO2020157558A1 (ja) 2021-12-23
JPWO2020157558A5 JPWO2020157558A5 (ja) 2022-11-10
JP7433250B2 true JP7433250B2 (ja) 2024-02-19

Family

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Family Applications (4)

Application Number Title Priority Date Filing Date
JP2020568868A Active JP7433250B2 (ja) 2019-01-29 2019-11-22 記憶装置
JP2024016208A Active JP7568878B2 (ja) 2019-01-29 2024-02-06 半導体装置
JP2024173977A Active JP7745059B2 (ja) 2019-01-29 2024-10-03 半導体装置
JP2025152725A Pending JP2025178310A (ja) 2019-01-29 2025-09-12 記憶装置

Family Applications After (3)

Application Number Title Priority Date Filing Date
JP2024016208A Active JP7568878B2 (ja) 2019-01-29 2024-02-06 半導体装置
JP2024173977A Active JP7745059B2 (ja) 2019-01-29 2024-10-03 半導体装置
JP2025152725A Pending JP2025178310A (ja) 2019-01-29 2025-09-12 記憶装置

Country Status (3)

Country Link
US (2) US12156396B2 (https=)
JP (4) JP7433250B2 (https=)
WO (1) WO2020157558A1 (https=)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016225613A (ja) * 2015-05-26 2016-12-28 株式会社半導体エネルギー研究所 半導体装置及び半導体装置の駆動方法
KR102825621B1 (ko) * 2020-04-17 2025-06-25 양쯔 메모리 테크놀로지스 씨오., 엘티디. 메모리 장치
JP2022049604A (ja) * 2020-09-16 2022-03-29 キオクシア株式会社 半導体装置及び半導体記憶装置
CN112599528B (zh) * 2020-12-14 2022-07-12 武汉新芯集成电路制造有限公司 半导体器件及其制备方法
JP2022148858A (ja) * 2021-03-24 2022-10-06 キオクシア株式会社 半導体記憶装置
US11974422B2 (en) * 2021-11-04 2024-04-30 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device
CN114512490B (zh) * 2022-01-07 2024-12-10 长江先进存储产业创新中心有限责任公司 一种存储器及其制备方法
JP2024000929A (ja) * 2022-06-21 2024-01-09 キオクシア株式会社 半導体記憶装置
US12131794B2 (en) * 2022-08-23 2024-10-29 Micron Technology, Inc. Structures for word line multiplexing in three-dimensional memory arrays
WO2024213980A1 (ja) * 2023-04-14 2024-10-17 株式会社半導体エネルギー研究所 半導体装置
KR20250087926A (ko) * 2023-12-08 2025-06-17 삼성전자주식회사 메모리 장치

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011151383A (ja) 2009-12-25 2011-08-04 Semiconductor Energy Lab Co Ltd 半導体装置
JP2013065638A (ja) 2011-09-15 2013-04-11 Elpida Memory Inc 半導体装置
JP2016225617A (ja) 2015-05-26 2016-12-28 株式会社半導体エネルギー研究所 記憶装置、又は該記憶装置を有する電子機器
JP2016225613A (ja) 2015-05-26 2016-12-28 株式会社半導体エネルギー研究所 半導体装置及び半導体装置の駆動方法
JP2018085507A (ja) 2016-11-17 2018-05-31 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
JP2018201003A (ja) 2017-05-26 2018-12-20 株式会社半導体エネルギー研究所 半導体装置及び電子機器

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JP2008140912A (ja) 2006-11-30 2008-06-19 Toshiba Corp 不揮発性半導体記憶装置
JP5398378B2 (ja) 2009-06-24 2014-01-29 株式会社東芝 半導体記憶装置及びその製造方法
WO2012002186A1 (en) 2010-07-02 2012-01-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
TWI555128B (zh) 2010-08-06 2016-10-21 半導體能源研究所股份有限公司 半導體裝置及半導體裝置的驅動方法
WO2012029638A1 (en) 2010-09-03 2012-03-08 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US8981367B2 (en) 2011-12-01 2015-03-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US8907392B2 (en) 2011-12-22 2014-12-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device including stacked sub memory cells
KR102721654B1 (ko) 2016-03-11 2024-10-23 가부시키가이샤 한도오따이 에네루기 켄큐쇼 복합체 및 트랜지스터
US11450669B2 (en) * 2018-07-24 2022-09-20 Intel Corporation Stacked thin-film transistor based embedded dynamic random-access memory

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011151383A (ja) 2009-12-25 2011-08-04 Semiconductor Energy Lab Co Ltd 半導体装置
JP2013065638A (ja) 2011-09-15 2013-04-11 Elpida Memory Inc 半導体装置
JP2016225617A (ja) 2015-05-26 2016-12-28 株式会社半導体エネルギー研究所 記憶装置、又は該記憶装置を有する電子機器
JP2016225613A (ja) 2015-05-26 2016-12-28 株式会社半導体エネルギー研究所 半導体装置及び半導体装置の駆動方法
JP2018085507A (ja) 2016-11-17 2018-05-31 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
JP2018201003A (ja) 2017-05-26 2018-12-20 株式会社半導体エネルギー研究所 半導体装置及び電子機器

Also Published As

Publication number Publication date
US12156396B2 (en) 2024-11-26
JP2024040266A (ja) 2024-03-25
JPWO2020157558A1 (ja) 2021-12-23
JP2025178310A (ja) 2025-12-05
JP7745059B2 (ja) 2025-09-26
JP2024177364A (ja) 2024-12-19
US20220108985A1 (en) 2022-04-07
WO2020157558A1 (ja) 2020-08-06
US20250081425A1 (en) 2025-03-06
JP7568878B2 (ja) 2024-10-16

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