JP7413217B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP7413217B2 JP7413217B2 JP2020156329A JP2020156329A JP7413217B2 JP 7413217 B2 JP7413217 B2 JP 7413217B2 JP 2020156329 A JP2020156329 A JP 2020156329A JP 2020156329 A JP2020156329 A JP 2020156329A JP 7413217 B2 JP7413217 B2 JP 7413217B2
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- Prior art keywords
- resin layer
- light receiving
- receiving element
- electrically connected
- semiconductor device
- Prior art date
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Description
図1は、第1実施形態に係る半導体装置1を示す模式断面図である。半導体装置1は、例えば、フォトリレーである。
図6は、第2実施形態に係る半導体装置4を示す模式断面図である。半導体装置4は、樹脂層10、入力側端子17および出力側端子19に代えて、樹脂層60、入力パッド70および出力パッド80を含む。
発光素子と、
前記発光素子に光結合された受光素子と、
前記受光素子に電気的に接続されたスイッチング素子と、
前記発光素子に電気的に接続された第1金属板と、
前記受光素子の裏面側に接続された第1樹脂層と、
前記スイッチング素子の裏面側に電気的に接続された第2金属板と、
前記発光素子、前記受光素子および前記スイッチング素子を封じた第2樹脂層と、
を備え、
前記発光素子は、前記受光素子の表面側に接合され、
前記第1樹脂層は、前記第1金属板と前記第2金属板との間に設けられ、
前記第2樹脂層は、前記第1金属板、前記第1樹脂層および前記第2金属板のそれぞれの表面側において、前記発光素子、前記受光素子および前記スイッチング素子を覆い、
前記第1樹脂層の裏面側に、前記第1金属板および前記第2金属板のそれぞれの裏面を露出させた半導体装置。
前記受光素子上において、前記発光素子を覆う第3樹脂をさらに備え、
前記第3樹脂は、前記第2樹脂と前記受光素子との間に設けられる付記1記載の半導体装置。
第2金属板は、前記スイッチング素子側の表面に設けられた溝を有する付記1または2に記載の半導体装置。
前記第1樹脂層の裏面から表面に向かう方向における前記第1樹脂層の厚さは、前記第1金属板および前記第2金属板の前記方向の厚さよりも厚い付記1~3のいずれか1つに記載の半導体装置。
Claims (8)
- 発光素子と、
前記発光素子に光結合された受光素子と、
前記受光素子に電気的に接続されたスイッチング素子と、
前記受光素子の裏面側および前記スイッチング素子の裏面側に設けられた第1樹脂層と、
前記第1樹脂層の表面側に、前記発光素子、前記受光素子および前記スイッチング素子を封じた第2樹脂層と、
前記第1樹脂層の裏面側に設けられ、前記発光素子に電気的に接続された入力側端子と、
前記第1樹脂層の裏面側において、前記入力側端子から離間して設けられ、前記スイッチング素子に電気的に接続された出力側端子と、
を備え、
前記発光素子は、前記受光素子の表面側に接合され、
前記第1樹脂層の上面視において、前記出力側端子の一部と前記受光素子が重なる半導体装置。 - 前記受光素子は、前記第1樹脂層の上面視において、前記入力側端子の一部に重なる請求項1記載の半導体装置。
- 前記第1樹脂層の表面側に設けられ、前記発光素子に金属ワイヤを介して電気的に接続されたボンディングパッドと、
前記第1樹脂層を前記裏面から前記表面に向かう第1方向に貫通し、前記ボンディングパッドと前記入力側端子とを電気的に接続した第1ビアコンタクトと、
前記第1樹脂層と前記スイッチング素子との間に設けられ、前記スイッチング素子に電気的に接続された第1マウントパッドと、
前記第1樹脂層を前記第1方向に貫通し、前記スイッチング素子と前記出力側端子を電気的に接続した第2ビアコンタクトと、
をさらに備えた請求項1または2に記載の半導体装置。 - 前記第1樹脂層は、前記第1方向の厚さが50マイクロメートル以下である請求項3記載の半導体装置。
- 前記第1樹脂層と前記受光素子との間に設けられた第2マウントパッドをさらに備えた請求項1~4のいずれか1つに記載の半導体装置。
- 前記受光素子上に前記発光素子を封じた第3樹脂層をさらに備え、
前記第2樹脂層は、前記第3樹脂層を覆う請求項1~5のいずれか1つに記載の半導体装置。 - 前記スイッチング素子は、ソース電極、ドレイン電極およびゲート電極を有するMOSトランジスタであり、
前記受光素子は、前記ソース電極と前記ゲート電極との間に電気的に接続され、前記出力側端子は、前記ドレイン電極に電気的に接続される請求項1~6のいずれか1つに記載の半導体装置。 - 前記発光素子は、第1電極と第2電極とを有し、
前記スイッチング素子は、前記第1樹脂層上に複数設けられ、
前記入力側端子および前記出力側端子は、それぞれ複数設けられ、
前記複数の入力側端子のうちの、第1入力側端子は、前記第1電極に接続され、第2入力側端子は、前記第2電極に電気的に接続され、
前記複数の出力側端子のうちの、第1出力側端子は、前記複数のスイッチング素子のうちの第1スイッチング素子に電気的に接続され、第2出力側端子は、第2スイッチング素子に電気的に接続され、
前記第1樹脂層の上面視において、前記複数の出力側端子の少なくともいずれか1つの一部と、前記受光素子と、が重なる請求項1~7のいずれか1つに記載の半導体装置。
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