JP7378693B1 - 半導体装置および半導体装置の製造方法 - Google Patents

半導体装置および半導体装置の製造方法 Download PDF

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Publication number
JP7378693B1
JP7378693B1 JP2023556766A JP2023556766A JP7378693B1 JP 7378693 B1 JP7378693 B1 JP 7378693B1 JP 2023556766 A JP2023556766 A JP 2023556766A JP 2023556766 A JP2023556766 A JP 2023556766A JP 7378693 B1 JP7378693 B1 JP 7378693B1
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layer
semiconductor device
plating
gold
substrate
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JP2023556766A
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Japanese (ja)
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JPWO2024247025A5 (https=
JPWO2024247025A1 (https=
Inventor
亮 奥畑
弘一郎 西澤
智之 森田
智明 徳久
寿和 清水
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes
    • H10D30/87—FETs having Schottky gate electrodes, e.g. metal-semiconductor FETs [MESFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Junction Field-Effect Transistors (AREA)
JP2023556766A 2023-05-29 2023-05-29 半導体装置および半導体装置の製造方法 Active JP7378693B1 (ja)

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Application Number Priority Date Filing Date Title
PCT/JP2023/019866 WO2024247025A1 (ja) 2023-05-29 2023-05-29 半導体装置および半導体装置の製造方法

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JP7378693B1 true JP7378693B1 (ja) 2023-11-13
JPWO2024247025A1 JPWO2024247025A1 (https=) 2024-12-05
JPWO2024247025A5 JPWO2024247025A5 (https=) 2025-05-13

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JP (1) JP7378693B1 (https=)
CN (1) CN121219834A (https=)
WO (1) WO2024247025A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2025109755A1 (ja) * 2023-11-24 2025-05-30 三菱電機株式会社 半導体装置およびその製造方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN121076034B (zh) * 2025-11-04 2026-03-10 深圳市联合蓝海应用材料科技股份有限公司 一种化合物半导体背孔器件及其制备方法和晶体管

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02214127A (ja) * 1989-02-15 1990-08-27 Mitsubishi Electric Corp 半導体装置およびその製造方法
JPH05102200A (ja) * 1991-10-03 1993-04-23 Mitsubishi Electric Corp 半導体装置
US20110059610A1 (en) * 2009-09-04 2011-03-10 Win Semiconductors Corp. Method of using an electroless plating for depositing a metal seed layer for the subsequent plated backside metal film
JP2014112634A (ja) * 2012-10-30 2014-06-19 Mitsubishi Electric Corp 半導体素子の製造方法、半導体素子
JP2022070436A (ja) * 2020-10-27 2022-05-13 富士通株式会社 半導体装置及びその製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02214127A (ja) * 1989-02-15 1990-08-27 Mitsubishi Electric Corp 半導体装置およびその製造方法
JPH05102200A (ja) * 1991-10-03 1993-04-23 Mitsubishi Electric Corp 半導体装置
US20110059610A1 (en) * 2009-09-04 2011-03-10 Win Semiconductors Corp. Method of using an electroless plating for depositing a metal seed layer for the subsequent plated backside metal film
JP2014112634A (ja) * 2012-10-30 2014-06-19 Mitsubishi Electric Corp 半導体素子の製造方法、半導体素子
JP2022070436A (ja) * 2020-10-27 2022-05-13 富士通株式会社 半導体装置及びその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2025109755A1 (ja) * 2023-11-24 2025-05-30 三菱電機株式会社 半導体装置およびその製造方法

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CN121219834A (zh) 2025-12-26
JPWO2024247025A1 (https=) 2024-12-05
WO2024247025A1 (ja) 2024-12-05

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