JP7325515B2 - 基板処理方法、及び基板処理装置 - Google Patents
基板処理方法、及び基板処理装置 Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims description 302
- 238000012545 processing Methods 0.000 title claims description 31
- 238000003672 processing method Methods 0.000 title claims description 24
- 230000001681 protective effect Effects 0.000 claims description 117
- 239000002313 adhesive film Substances 0.000 claims description 63
- 238000005530 etching Methods 0.000 claims description 30
- 239000000853 adhesive Substances 0.000 claims description 23
- 230000001070 adhesive effect Effects 0.000 claims description 23
- 238000004140 cleaning Methods 0.000 claims description 20
- 239000007788 liquid Substances 0.000 claims description 15
- 238000003860 storage Methods 0.000 claims description 15
- 238000005520 cutting process Methods 0.000 claims description 11
- 230000004913 activation Effects 0.000 claims description 10
- 230000003213 activating effect Effects 0.000 claims description 4
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims 1
- 230000015572 biosynthetic process Effects 0.000 description 35
- 238000000034 method Methods 0.000 description 15
- 238000002360 preparation method Methods 0.000 description 12
- 239000004065 semiconductor Substances 0.000 description 12
- 238000000227 grinding Methods 0.000 description 9
- 239000000463 material Substances 0.000 description 8
- 238000011068 loading method Methods 0.000 description 7
- 230000008569 process Effects 0.000 description 7
- 238000002679 ablation Methods 0.000 description 5
- 230000006866 deterioration Effects 0.000 description 5
- 238000001312 dry etching Methods 0.000 description 5
- 239000002245 particle Substances 0.000 description 5
- 238000005336 cracking Methods 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 238000005498 polishing Methods 0.000 description 4
- 238000012546 transfer Methods 0.000 description 4
- 238000001039 wet etching Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 230000010355 oscillation Effects 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 2
- 238000005299 abrasion Methods 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 239000000428 dust Substances 0.000 description 2
- 239000006260 foam Substances 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 238000004528 spin coating Methods 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 238000007792 addition Methods 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 229910002092 carbon dioxide Inorganic materials 0.000 description 1
- 239000001569 carbon dioxide Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000012217 deletion Methods 0.000 description 1
- 230000037430 deletion Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 229910001882 dioxygen Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000004088 foaming agent Substances 0.000 description 1
- 125000000524 functional group Chemical group 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000003094 microcapsule Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 238000013021 overheating Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- B—PERFORMING OPERATIONS; TRANSPORTING
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- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/36—Removing material
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Description
複数のチップに分割された第1基板と、前記チップごとに分割済みであって前記チップを保護する保護膜と、前記第1基板を支持する第2基板と、前記保護膜と前記第2基板とを接着する接着膜とを含む積層基板を準備することと、
前記第2基板を透過する光線で前記接着膜の接着力を低下させることと、
前記接着膜との接着力を低下させた前記保護膜と前記チップとを、ピックアップ部で前記接着膜からピックアップすることと、
前記ピックアップ部によって前記チップを保持した状態で、前記保護膜を溶解する液体に前記保護膜を浸漬し、前記保護膜を除去することと、
を有する。
11 第1主表面
12 第2主表面
14 デバイス
15 チップ
20 保護膜
30 第2基板
40 接着膜
50 積層基板
60 第3基板
61 主表面
64 デバイス
100 基板処理装置
110 第1保持台
120 照射器
130 ピックアップ部
140 貯留部
150 活性化部
160 第2保持台
Claims (11)
- 複数のチップに分割された第1基板と、前記チップごとに分割済みであって前記チップを保護する保護膜と、前記第1基板を支持する第2基板と、前記保護膜と前記第2基板とを接着する接着膜とを含む積層基板を準備することと、
前記第2基板を透過する光線で前記接着膜の接着力を低下させることと、
前記接着膜との接着力を低下させた前記保護膜と前記チップとを、ピックアップ部で前記接着膜からピックアップすることと、
前記ピックアップ部によって前記チップを保持した状態で、前記保護膜を溶解する液体に前記保護膜を浸漬し、前記保護膜を除去することと、
を有する、基板処理方法。 - 前記ピックアップ部によって前記チップを保持した状態で、前記チップの前記保護膜を除去した表面を活性化することと、
前記ピックアップ部によって前記チップを保持した状態で、前記チップの活性化した表面を、第3基板のデバイスが形成された主表面と向い合せ、接合することと、
を有する、請求項1に記載の基板処理方法。 - 複数のチップに分割された第1基板と、前記チップごとに分割済みであって前記チップを保護する保護膜と、前記第1基板を支持する第2基板と、前記保護膜と前記第2基板とを接着する接着膜とを含む積層基板を準備することと、
前記第2基板を透過する光線で前記接着膜の接着力を低下させることと、
前記接着膜との接着力を低下させた前記保護膜と前記チップとを、ピックアップ部で前記接着膜からピックアップすることと、
を有する、基板処理方法であって、
前記第1基板の第1主表面に前記保護膜を形成することと、前記保護膜の形成後に、前記保護膜と前記第2基板とを前記接着膜で接着することと、前記保護膜と前記第2基板との接着後に、前記第1基板の前記第1主表面とは反対向きの第2主表面を前記第1主表面に近付けるように前記第1基板の一部を除去し、前記第1基板を薄化することと、を有し、
前記保護膜の形成後、前記保護膜と前記第2基板との接着前に、前記保護膜の表面の分割予定線に前記チップのデバイスよりも深い第1溝を形成することと、
前記第1基板の薄化後、前記チップのピックアップ前に、前記第1基板の前記第2主表面の分割予定線に開口部を有するマスクを形成し、前記マスクの前記開口部にて前記第2主表面をエッチングし、前記第1溝につながる第2溝を形成し、前記第1基板を複数の前記チップに分割することと、
を有する、基板処理方法。 - 複数のチップに分割された第1基板と、前記チップごとに分割済みであって前記チップを保護する保護膜と、前記第1基板を支持する第2基板と、前記保護膜と前記第2基板とを接着する接着膜とを含む積層基板を準備することと、
前記第2基板を透過する光線で前記接着膜の接着力を低下させることと、
前記接着膜との接着力を低下させた前記保護膜と前記チップとを、ピックアップ部で前記接着膜からピックアップすることと、
を有する、基板処理方法であって、
前記第1基板の第1主表面に前記保護膜を形成することと、前記保護膜の形成後に、前記保護膜と前記第2基板とを前記接着膜で接着することと、前記保護膜と前記第2基板との接着後に、前記第1基板の前記第1主表面とは反対向きの第2主表面を前記第1主表面に近付けるように前記第1基板の一部を除去し、前記第1基板を薄化することと、を有し、
前記保護膜の形成後、前記保護膜と前記第2基板との接着前に、前記保護膜の表面の分割予定線に、薄化後の前記第1基板の前記第2主表面に達する深さの溝を形成することと、
前記保護膜と前記第2基板との接着後に、前記第1基板の薄化によって前記第1基板の前記第2主表面に前記溝を露出させ、前記第1基板を複数の前記チップに分割することと、
前記第1基板の薄化後、前記チップのピックアップ前に、前記溝を洗浄し、且つ前記溝の側面をエッチングすることと、
を有する、基板処理方法。 - 前記保護膜の表面の分割予定線に前記溝を形成することは、前記チップのデバイスよりも深い一次溝をレーザー光線で形成し、前記一次溝の側面をエッチングし、次いで、前記一次溝の底面をブレードで切削し、薄化後の前記第1基板の前記第2主表面に達する深さの二次溝を形成することを含む、請求項4に記載の基板処理方法。
- 複数のチップに分割された第1基板と、前記チップごとに分割済みであって前記チップを保護する保護膜と、前記第1基板を支持する第2基板と、前記保護膜と前記第2基板とを接着する接着膜とを含む積層基板を準備することと、
前記第2基板を透過する光線で前記接着膜の接着力を低下させることと、
前記接着膜との接着力を低下させた前記保護膜と前記チップとを、ピックアップ部で前記接着膜からピックアップすることと、
を有する、基板処理方法であって、
前記第1基板の第1主表面に前記保護膜を形成することと、前記保護膜の形成後に、前記保護膜と前記第2基板とを前記接着膜で接着することと、前記保護膜と前記第2基板との接着後に、前記第1基板の前記第1主表面とは反対向きの第2主表面を前記第1主表面に近付けるように前記第1基板の一部を除去し、前記第1基板を薄化することと、を有し、
前記保護膜の形成後、前記保護膜と前記第2基板との接着前に、前記保護膜の表面の分割予定線に前記チップのデバイスよりも深い第1溝を形成することと、
前記第1基板の薄化後、前記チップのピックアップの前に、前記第1基板の前記第2主表面の分割予定線をブレードで切削し、前記第1溝につながる第2溝を形成し、前記第1基板を複数の前記チップに分割することと、
前記第1基板の薄化後、前記チップのピックアップ前に、前記第1溝及び前記第2溝を洗浄し、且つ前記第1溝及び前記第2溝の側面をエッチングすることと、
を有する、基板処理方法。 - 前記第1溝の形成後、前記保護膜と前記第2基板との接着前に、前記第1溝の側面をエッチングすることを有する、請求項6に記載の基板処理方法。
- 複数のチップに分割された第1基板と、前記チップごとに分割済みであって前記チップを保護する保護膜と、前記第1基板を支持する第2基板と、前記保護膜と前記第2基板とを接着する接着膜とを含む積層基板を準備することと、
前記第2基板を透過する光線で前記接着膜の接着力を低下させることと、
前記接着膜との接着力を低下させた前記保護膜と前記チップとを、ピックアップ部で前記接着膜からピックアップすることと、
を有する、基板処理方法であって、
前記第1基板の第1主表面に前記保護膜を形成することと、前記保護膜の形成後に、前記保護膜と前記第2基板とを前記接着膜で接着することと、前記保護膜と前記第2基板との接着後に、前記第1基板の前記第1主表面とは反対向きの第2主表面を前記第1主表面に近付けるように前記第1基板の一部を除去し、前記第1基板を薄化することと、を有し、
前記第1基板の薄化後、前記チップのピックアップ前に、前記第1基板の前記第2主表面の分割予定線に、前記接着膜に達する深さの溝を形成し、前記第1基板を複数の前記チップに分割し、且つ前記チップごとに前記保護膜を分割することと、
前記溝の形成後、前記チップのピックアップ前に、前記溝を洗浄し、且つ前記溝の側面をエッチングすることと、
を有する、基板処理方法。 - 前記第1基板の前記第2主表面から前記接着膜に達する深さの前記溝は、レーザー光線で形成する、請求項8に記載の基板処理方法。
- 複数のチップに分割された第1基板と、前記チップごとに分割済みであって前記チップを保護する保護膜と、前記第1基板を支持する第2基板と、前記保護膜と前記第2基板とを接着する接着膜とを含む積層基板を保持する第1保持台と、
前記第2基板を透過し前記接着膜の接着力を低下させる光線を前記第2基板に照射する照射器と、
前記接着膜との接着力を低下させた前記保護膜と前記チップとをピックアップするピックアップ部と、
前記保護膜を溶解する液体を貯留する貯留部と、
前記ピックアップ部で保持された前記チップを前記第1保持台から前記貯留部に移動させるべく、前記ピックアップ部を移動させる移動部と、
を有する、基板処理装置。 - 前記チップの前記保護膜を除去した表面を活性化する活性化部と、
前記チップの活性化した表面と接合される第3基板を保持する第2保持台とを有し、
前記移動部は、前記ピックアップ部で保持された前記チップを前記第1保持台から前記貯留部及び前記活性化部を経て前記第2保持台に移動させるべく、前記ピックアップ部を移動させる、請求項10に記載の基板処理装置。
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