JP7292175B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP7292175B2 JP7292175B2 JP2019189278A JP2019189278A JP7292175B2 JP 7292175 B2 JP7292175 B2 JP 7292175B2 JP 2019189278 A JP2019189278 A JP 2019189278A JP 2019189278 A JP2019189278 A JP 2019189278A JP 7292175 B2 JP7292175 B2 JP 7292175B2
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
- H10D62/8325—Silicon carbide
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/01—Manufacture or treatment
- H10D12/031—Manufacture or treatment of IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/01—Manufacture or treatment
- H10D12/031—Manufacture or treatment of IGBTs
- H10D12/032—Manufacture or treatment of IGBTs of vertical IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
- H10D62/109—Reduced surface field [RESURF] PN junction structures
- H10D62/111—Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/40—Crystalline structures
- H10D62/405—Orientations of crystalline planes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/60—Schottky-barrier diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/411—Insulated-gate bipolar transistors [IGBT]
- H10D12/441—Vertical IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
- H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
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- Electrodes Of Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Composite Materials (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2019189278A JP7292175B2 (ja) | 2019-10-16 | 2019-10-16 | 半導体装置 |
| US17/014,032 US11563090B2 (en) | 2019-10-16 | 2020-09-08 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2019189278A JP7292175B2 (ja) | 2019-10-16 | 2019-10-16 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2021064723A JP2021064723A (ja) | 2021-04-22 |
| JP2021064723A5 JP2021064723A5 (https=) | 2022-04-13 |
| JP7292175B2 true JP7292175B2 (ja) | 2023-06-16 |
Family
ID=75488204
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2019189278A Active JP7292175B2 (ja) | 2019-10-16 | 2019-10-16 | 半導体装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US11563090B2 (https=) |
| JP (1) | JP7292175B2 (https=) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12464791B2 (en) | 2022-03-07 | 2025-11-04 | Denso Corporation | Semiconductor device |
| WO2026079220A1 (ja) * | 2024-10-11 | 2026-04-16 | 住友電気工業株式会社 | 炭化珪素半導体装置 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2015002277A (ja) | 2013-06-17 | 2015-01-05 | 三菱電機株式会社 | 炭化珪素半導体装置 |
| JP2019520703A (ja) | 2016-05-31 | 2019-07-18 | クリー インコーポレイテッドCree Inc. | イオン注入チャネリング技術により形成される超接合パワーシリコンカーバイド半導体デバイス及び関連方法 |
Family Cites Families (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007036213A (ja) | 2005-06-20 | 2007-02-08 | Toshiba Corp | 半導体素子 |
| US7462909B2 (en) | 2005-06-20 | 2008-12-09 | Kabushiki Kaisha Toshiba | Semiconductor device and method of fabricating the same |
| DE102005046707B3 (de) | 2005-09-29 | 2007-05-03 | Siced Electronics Development Gmbh & Co. Kg | SiC-PN-Leistungsdiode |
| JP4857697B2 (ja) | 2005-10-05 | 2012-01-18 | トヨタ自動車株式会社 | 炭化珪素半導体装置 |
| JP2008177328A (ja) * | 2007-01-18 | 2008-07-31 | Denso Corp | 半導体装置およびその製造方法 |
| EP2610912A4 (en) * | 2010-08-27 | 2014-10-22 | Nat Univ Corp Nara Inst | SIC SEMICONDUCTOR ELEMENT |
| JP2012186353A (ja) * | 2011-03-07 | 2012-09-27 | Fuji Electric Co Ltd | 複合半導体装置 |
| JP2013165197A (ja) * | 2012-02-13 | 2013-08-22 | Sumitomo Electric Ind Ltd | 炭化珪素半導体装置および炭化珪素半導体装置の製造方法 |
| JP5867134B2 (ja) * | 2012-02-13 | 2016-02-24 | 住友電気工業株式会社 | 炭化珪素半導体装置の製造方法 |
| US9722018B2 (en) * | 2012-03-30 | 2017-08-01 | Fuji Electric Co., Ltd. | Vertical high voltage semiconductor apparatus and fabrication method of vertical high voltage semiconductor apparatus |
| JP2013232574A (ja) | 2012-05-01 | 2013-11-14 | Mitsubishi Electric Corp | 炭化珪素半導体装置 |
| JP2014146748A (ja) | 2013-01-30 | 2014-08-14 | Toshiba Corp | 半導体装置及びその製造方法並びに半導体基板 |
| JP6177812B2 (ja) * | 2013-02-05 | 2017-08-09 | 三菱電機株式会社 | 絶縁ゲート型炭化珪素半導体装置及びその製造方法 |
| CN105190852B (zh) * | 2013-03-15 | 2018-09-11 | 美国联合碳化硅公司 | 改进的vjfet器件 |
| JP6241958B2 (ja) * | 2013-08-08 | 2017-12-13 | 富士電機株式会社 | 高耐圧半導体装置およびその製造方法 |
| JP6244826B2 (ja) | 2013-11-01 | 2017-12-13 | 住友金属鉱山株式会社 | 炭化珪素基板、炭化珪素基板製造方法、半導体素子 |
| JP2016166112A (ja) * | 2015-03-10 | 2016-09-15 | 株式会社東芝 | 半導体基板及び半導体装置 |
| JP6441190B2 (ja) * | 2015-09-11 | 2018-12-19 | 株式会社東芝 | 半導体装置の製造方法 |
| JP2017168720A (ja) | 2016-03-17 | 2017-09-21 | 富士電機株式会社 | 炭化珪素半導体装置の製造方法 |
| JP6833742B2 (ja) | 2018-02-07 | 2021-02-24 | 株式会社東芝 | 半導体装置、基板、半導体装置の製造方法、及び、基板の製造方法 |
| JP7023882B2 (ja) | 2019-02-04 | 2022-02-22 | 株式会社東芝 | 半導体装置の製造方法、基板の製造方法、半導体装置、基板、及び、基板の製造装置 |
-
2019
- 2019-10-16 JP JP2019189278A patent/JP7292175B2/ja active Active
-
2020
- 2020-09-08 US US17/014,032 patent/US11563090B2/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2015002277A (ja) | 2013-06-17 | 2015-01-05 | 三菱電機株式会社 | 炭化珪素半導体装置 |
| JP2019520703A (ja) | 2016-05-31 | 2019-07-18 | クリー インコーポレイテッドCree Inc. | イオン注入チャネリング技術により形成される超接合パワーシリコンカーバイド半導体デバイス及び関連方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2021064723A (ja) | 2021-04-22 |
| US20210118999A1 (en) | 2021-04-22 |
| US11563090B2 (en) | 2023-01-24 |
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