JP7253563B2 - 深層学習人工ニューラルネットワークにおけるアナログニューラルメモリ用のデコーダ - Google Patents

深層学習人工ニューラルネットワークにおけるアナログニューラルメモリ用のデコーダ Download PDF

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JP7253563B2
JP7253563B2 JP2020548740A JP2020548740A JP7253563B2 JP 7253563 B2 JP7253563 B2 JP 7253563B2 JP 2020548740 A JP2020548740 A JP 2020548740A JP 2020548740 A JP2020548740 A JP 2020548740A JP 7253563 B2 JP7253563 B2 JP 7253563B2
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circuit
bit line
decoder circuit
array
memory cells
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JP2021517705A5 (https=
JPWO2019177698A5 (https=
JP2021517705A (ja
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バン トラン、ヒュー
ホン、スタンレー
リ、アン
ブー、サン
パム、ヒエン
ニュエン、カ
トラン、ハン
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Silicon Storage Technology Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G06N3/065—Analogue means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/045—Combinations of networks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/045—Combinations of networks
    • G06N3/0455—Auto-encoder networks; Encoder-decoder networks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/0464—Convolutional networks [CNN, ConvNet]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/54—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using elements simulating biological cells, e.g. neuron
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0425—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/02—Sample-and-hold arrangements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/02—Structural aspects of erasable programmable read-only memories
    • G11C2216/04—Nonvolatile memory cell provided with a separate control gate for erasing the cells, i.e. erase gate, independent of the normal read control gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
    • G11C2216/14—Circuits or methods to write a page or sector of information simultaneously into a nonvolatile memory, typically a complete row or word line in flash memory

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Biomedical Technology (AREA)
  • Data Mining & Analysis (AREA)
  • Biophysics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • General Health & Medical Sciences (AREA)
  • Molecular Biology (AREA)
  • Computational Linguistics (AREA)
  • Evolutionary Computation (AREA)
  • Artificial Intelligence (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Neurology (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)
JP2020548740A 2018-03-14 2019-01-24 深層学習人工ニューラルネットワークにおけるアナログニューラルメモリ用のデコーダ Active JP7253563B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2023049721A JP7547536B2 (ja) 2018-03-14 2023-03-27 深層学習人工ニューラルネットワークにおけるアナログニューラルメモリ用のデコーダ
JP2024146132A JP7791950B2 (ja) 2018-03-14 2024-08-28 深層学習人工ニューラルネットワークにおけるアナログニューラルメモリ用のデコーダ
JP2025247648A JP2026062708A (ja) 2018-03-14 2025-12-12 深層学習人工ニューラルネットワークにおけるアナログニューラルメモリ用のデコーダ

Applications Claiming Priority (5)

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US201862642884P 2018-03-14 2018-03-14
US62/642,884 2018-03-14
US15/991,890 US11087207B2 (en) 2018-03-14 2018-05-29 Decoders for analog neural memory in deep learning artificial neural network
US15/991,890 2018-05-29
PCT/US2019/015022 WO2019177698A1 (en) 2018-03-14 2019-01-24 Decoders for analog neural memory in deep learning artificial neural network

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JP2021517705A5 JP2021517705A5 (https=) 2022-01-24
JPWO2019177698A5 JPWO2019177698A5 (https=) 2022-01-24
JP7253563B2 true JP7253563B2 (ja) 2023-04-06

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JP2023049721A Active JP7547536B2 (ja) 2018-03-14 2023-03-27 深層学習人工ニューラルネットワークにおけるアナログニューラルメモリ用のデコーダ
JP2024146132A Active JP7791950B2 (ja) 2018-03-14 2024-08-28 深層学習人工ニューラルネットワークにおけるアナログニューラルメモリ用のデコーダ
JP2025247648A Pending JP2026062708A (ja) 2018-03-14 2025-12-12 深層学習人工ニューラルネットワークにおけるアナログニューラルメモリ用のデコーダ

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JP2024146132A Active JP7791950B2 (ja) 2018-03-14 2024-08-28 深層学習人工ニューラルネットワークにおけるアナログニューラルメモリ用のデコーダ
JP2025247648A Pending JP2026062708A (ja) 2018-03-14 2025-12-12 深層学習人工ニューラルネットワークにおけるアナログニューラルメモリ用のデコーダ

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US (4) US11087207B2 (https=)
EP (4) EP4650989A3 (https=)
JP (4) JP7253563B2 (https=)
KR (4) KR102516399B1 (https=)
CN (2) CN119599075A (https=)
TW (2) TWI764503B (https=)
WO (1) WO2019177698A1 (https=)

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