JP7149164B2 - 表示装置 - Google Patents
表示装置 Download PDFInfo
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- JP7149164B2 JP7149164B2 JP2018207672A JP2018207672A JP7149164B2 JP 7149164 B2 JP7149164 B2 JP 7149164B2 JP 2018207672 A JP2018207672 A JP 2018207672A JP 2018207672 A JP2018207672 A JP 2018207672A JP 7149164 B2 JP7149164 B2 JP 7149164B2
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- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
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- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
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- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
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- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
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- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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- G09G2300/0452—Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
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- G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
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- G09G2360/16—Calculation or use of calculated indices related to luminance levels in display data
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Description
図1は、実施形態に係る表示装置を模式的に示す平面図である。図1に示すように、表示装置1は、アレイ基板2と、画素Pix(画素群)と、駆動回路12と、駆動IC(Integrated Circuit)210と、カソード配線60と、を含む。アレイ基板2は、各画素Pixを駆動するための駆動回路基板であり、バックプレーン又はアクティブマトリクス基板とも呼ばれる。アレイ基板2は、基板21、複数のトランジスタ、複数の容量及び各種配線等を有する。
図11は、各発光素子の出力階調値の設定方法を説明するためのフローチャートである。第1実施形態では、信号処理回路100は、あらかじめ定められたデータLUTに基づいて出力階調値SoR、SoGa、SoGb、SoBを演算するが、これに限定されない。図11に示すように、まず、信号処理回路100は、1フレーム画像を取り込む(ステップST1)。具体的には、バッファ125は、1フレーム分の映像信号Vsigを取り込んで、赤色、緑色、青色のそれぞれに対応する入力階調値SiR、SiG、SiBを記憶する。
図12は、第2変形例に係る信号処理回路の構成を模式的に示すブロック図である。図13は、第2変形例に係る各発光素子の出力階調値の設定方法を説明するためのフローチャートである。図12に示すように、信号処理回路100Aは、さらに第2処理回路120を備える。以下の説明では、隣り合う2つの画素Pixを、第1画素群Pix1、第2画素群Pix2と表す。信号処理回路100Aは、第1画素群Pix1の入力階調値SiR、SiG、SiBに基づいて、第1画素群Pix1の各画素49に加え第2画素群Pix2の一部の画素49を点灯させる。
図14は、第3変形例に係る各発光素子の出力階調値の設定方法を説明するためのフローチャートである。第2変形例において、第1処理回路110が、ステップST22からステップST26の処理を行い、第2処理回路120がステップST31からステップST39の処理を行うとしたが、これに限られない。第1処理回路110及び第2処理回路120が行う処理を入れ替えてもよい。第3変形例において、第1処理回路110がメモリ115に保持階調値SorGaが保持されているか否かを判定する。なお、各ステップSTにおいて、第2変形例と共通する記載は省略する。
図15Aから図15Cは、1つの画素群における各発光素子の配置パターンの変形例を示す平面図である。実施形態では、1画素Pixにおいて、図2に示すように赤色発光素子3R、第1緑色発光素子3Ga、第2緑色発光素子3Gb及び青色発光素子3Bが配置されるとしたが、各発光素子3の配置パターンはこれに限られない。図15Aは、第4変形例に係る1つの画素群における各発光素子の第1配置パターンを示す平面図である。図15Aに示すように、第1配置パターンAP1では、赤色発光素子3Rと第1緑色発光素子3Gaは第2方向Dyで並ぶ。赤色発光素子3Rと第2緑色発光素子3Gbは第1方向Dxで並ぶ。第1緑色発光素子3Gaと青色発光素子3Bは第1方向Dxで並ぶ。また、第2緑色発光素子3Gbと青色発光素子3Bは第2方向Dyで並ぶ。
図16Aから図16Cは、2つの画素群における各発光素子3の配置パターンの変形例を示す平面図である。実施形態及び第4変形例において、各発光素子3の配置パターンについて記載したが、マトリクス状に配置された画素Pixの全てがこの配置である場合、各赤色発光素子3R、第1緑色発光素子3Ga、第2緑色発光素子3Gb、青色発光素子3Bは、それぞれ、一定の方向に配置されることとなる。このような場合、特に第1緑色発光素子3Gaのような非点灯状態となりやすい画素が一方向に配列さていると、スジムラとして視認される恐れがある。そこで、第5変形例では、各発光素子3の配置パターンが異なる2種類の画素Pixを配置する。このようにすることで、スジムラの視認を抑制することができる。
図17は、第6変形例に係る赤色発光素子を示す断面図である。表示装置1において、発光素子3はフェースアップ構造に限定されず、発光素子3の下部が、アノード電極23及びカソード電極22に接続される、いわゆるフェースダウン構造であってもよい。図17では、発光素子3のうち、赤色発光素子3Raの断面構造を示す。
図18は、第7変形例に係る赤色発光素子を示す断面図である。図18に示すように、第7変形例の赤色発光素子3Rbにおいて、発光層34の第1発光層34a及び第2発光層34bは、同層に設けられる。第1発光層34a及び第2発光層34bは、p型クラッド層35の上において、隣接して設けられる。第1発光層34aの上面及び第2発光層34bの上面は、n型クラッド層33に接し、第1発光層34aの下面及び第2発光層34bの下面は、p型クラッド層35に接する。
図19は、第8変形例に係る赤色発光素子を示す断面図である。図19に示すように、第8変形例の赤色発光素子3Rcにおいて、p型クラッド層35は、第3p型クラッド層35cを有する。第3p型クラッド層35cは、第1p型クラッド層35aとp型電極36との間に設けられる。第3p型クラッド層35cは、高濃度不純物領域が形成された窒化ガリウム(P+GaN)である。
図20は、第9変形例に係る赤色発光素子を示す断面図である。図20に示すように、第9変形例の赤色発光素子3Rdは、図7と同様に複数の部分発光素子3sを有している。赤色発光素子3Rdのp型クラッド層35は、第3p型クラッド層35cを有する。第3p型クラッド層35cは、高濃度不純物領域が形成された窒化ガリウム(P+GaN)である。第3p型クラッド層35cは、第1p型クラッド層35aとp型電極37との間に設けられる。また、発光層34は、第3p型クラッド層35c、第1p型クラッド層35a及び第2p型クラッド層35bと、n型クラッド層33との間に設けられる。
図21は、第10変形例に係る赤色発光素子を示す断面図である。図21に示すように、第10変形例の赤色発光素子3Reにおいて、発光層34の第1発光層34a及び第2発光層34bは、p型クラッド層35の上に,この順で積層されている。第1発光層34a及び第2発光層34bの積層の順番は逆であってもよい。
2 アレイ基板
3 発光素子
3R、3Ra、3Rb、3Rc、3Rd、3Re 赤色発光素子
3Ga 第1緑色発光素子
3Gb 第2緑色発光素子
3B 青色発光素子
12 駆動回路
21 基板
49R 第1画素
49Ga 第2画素
49Gb 第3画素
49B 第4画素
61、65、71、71A、75、79 半導体層
64、66、74、78 ゲート電極
62、72 ソース電極
67、73、77 ドレイン電極
61a 第1部分半導体層
210 駆動IC
100、100A 信号処理回路
110 第1処理回路
115 メモリ
120 第2処理回路
125 バッファ
DRT 駆動トランジスタ
BCT 出力トランジスタ
IST 初期化トランジスタ
SST 画素選択トランジスタ
RST リセットトランジスタ
PVDD アノード電源電位
PVSS カソード電源電位
L1 アノード電源線
L2 映像信号線
L3 リセット電源線
L4 初期化電源線
L5 リセット制御信号線
L6 出力制御信号線
L7 画素制御信号線
L8 初期化制御信号線
L9 接続配線
Claims (12)
- 基板と、
前記基板に設けられた複数の画素と、を有し、
複数の前記画素の各々は、赤色発光素子と第1緑色発光素子とを含み、
赤色を表示させる入力信号に基づいて前記第1緑色発光素子が前記赤色発光素子と同時に点灯する時、前記第1緑色発光素子の発光強度は、前記赤色発光素子の発光強度よりも小さく、かつ、前記第1緑色発光素子の光のスペクトルの半値幅は、前記赤色発光素子の光のスペクトルの半値幅よりも大きい
表示装置。 - 複数の前記画素の各々は、さらに、第2緑色発光素子を有し、
前記第2緑色発光素子の発光強度は、前記第1緑色発光素子の発光強度よりも大きい
請求項1に記載の表示装置。 - 前記第1緑色発光素子の光のスペクトルの極大発光波長は、前記第2緑色発光素子の光のスペクトルの極大発光波長よりも長く、前記赤色発光素子の光のスペクトルの極大発光波長よりも短い
請求項2に記載の表示装置。 - 複数の前記画素の各々は、さらに、青色発光素子を有し、
前記赤色発光素子と前記第1緑色発光素子とは、第1方向に並び、
前記赤色発光素子と、前記第2緑色発光素子又は前記青色発光素子の一方とは、前記第1方向と交差する第2方向に並ぶ
請求項2に記載の表示装置。 - 複数の前記画素の各々は、さらに、青色発光素子を有し、
前記赤色発光素子と、前記第2緑色発光素子又は前記青色発光素子の一方とは、第1方向に並び、
前記赤色発光素子と、前記第2緑色発光素子又は前記青色発光素子の他方とは、前記第1方向と交差する第2方向に並ぶ
請求項2に記載の表示装置。 - 前記画素の入力階調値が第1しきい値以下の場合に前記赤色発光素子が点灯し、前記第1緑色発光素子が点灯せず、
前記画素の入力階調値が前記第1しきい値よりも大きく、且つ、前記第1しきい値よりも大きい第2しきい値よりも小さい場合に前記赤色発光素子及び前記第1緑色発光素子が点灯する
請求項1に記載の表示装置。 - 前記画素の入力階調値が前記第2しきい値以上の場合に前記赤色発光素子が点灯し、前記第1緑色発光素子が点灯しない、
請求項6に記載の表示装置。 - 複数の前記画素の各々は、第1画素と、前記第1画素に隣接する第2画素を含み、
前記第1画素の入力階調値に基づいて、前記第1画素の前記第1緑色発光素子の第1階調値と、前記第2画素の前記第1緑色発光素子の第2階調値とを演算し、前記第1画素の前記第1緑色発光素子と前記第2画素の前記第1緑色発光素子とが点灯され、
前記第1画素の前記入力階調値に基づいて点灯される前記第1画素の前記第1緑色発光素子に供給される駆動電流がしきい値電流よりも大きい場合に、前記第1画素の前記第1緑色発光素子が前記第1階調値より低い第1出力階調値で点灯し、前記第2画素の前記第1緑色発光素子が前記第2階調値より高い第2出力階調値で点灯する、
請求項1に記載の表示装置。 - 前記第2出力階調値は、前記第2階調値と第3階調値との和であり、
前記第3階調値は、前記第1階調値と前記第1出力階調値との差である、
請求項8に記載の表示装置。 - 前記赤色発光素子の発光層は、ユウロピウム(Eu)が添加された窒化ガリウム(GaN)を含む
請求項1に記載の表示装置。 - 赤色を表示させる第1入力信号に基づいて発光する第1赤色発光素子及び第1緑色発光素子を含む第1画素と、
前記第1画素に隣接し、赤色を表示させる第2入力信号に基づいて発光する第2赤色発光素子及び第2緑色発光素子を含む第2画素と、
信号処理回路と
を有し、
前記第1入力信号は、赤色の入力階調値を含み、
前記第2緑色発光素子は、前記第1入力信号に基づいて発光することが可能であり、
前記第1入力信号に基づいて前記第2緑色発光素子が発光する時、
前記信号処理回路は、前記入力階調値に基づいて、前記第1緑色発光素子の第1階調値と、前記第2緑色発光素子の第2階調値とを出力し、
前記第1緑色発光素子に供給される、前記第1階調値に基づく駆動電流が、しきい値電流よりも大きい時、
前記第1階調値より低い第3階調値で、前記第1緑色発光素子が点灯し、
前記第2階調値より高い第4階調値で、前記第2緑色発光素子が点灯する、表示装置。 - 前記第4階調値は、前記第2階調値と第5階調値との和であり、
前記第5階調値は、前記第1階調値と前記第3階調値との差である、
請求項11に記載の表示装置。
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