JP7093419B2 - 不揮発性メモリアレイにおけるピーク電力需要及びノイズを管理するためのシステム及び方法 - Google Patents

不揮発性メモリアレイにおけるピーク電力需要及びノイズを管理するためのシステム及び方法 Download PDF

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JP7093419B2
JP7093419B2 JP2020550668A JP2020550668A JP7093419B2 JP 7093419 B2 JP7093419 B2 JP 7093419B2 JP 2020550668 A JP2020550668 A JP 2020550668A JP 2020550668 A JP2020550668 A JP 2020550668A JP 7093419 B2 JP7093419 B2 JP 7093419B2
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JPWO2019182684A5 (https=
JP2021518627A (ja
JP2021518627A5 (https=
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ティワリ、ビピン
バン トラン、ヒュー
ドー、ナン
レイテン、マーク
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Silicon Storage Technology Inc
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Silicon Storage Technology Inc
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/32—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H10D30/684—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection
    • H10D30/685—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection from the channel
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/6891—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
    • H10D30/6892—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode having at least one additional gate other than the floating gate and the control gate, e.g. program gate, erase gate or select gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0425—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
JP2020550668A 2018-03-23 2019-01-28 不揮発性メモリアレイにおけるピーク電力需要及びノイズを管理するためのシステム及び方法 Active JP7093419B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201862647573P 2018-03-23 2018-03-23
US62/647,573 2018-03-23
US16/015,020 US10580491B2 (en) 2018-03-23 2018-06-21 System and method for managing peak power demand and noise in non-volatile memory array
US16/015,020 2018-06-21
PCT/US2019/015369 WO2019182684A2 (en) 2018-03-23 2019-01-28 System and method for managing peak power demand and noise in non-volatile memory array

Publications (4)

Publication Number Publication Date
JP2021518627A JP2021518627A (ja) 2021-08-02
JPWO2019182684A5 JPWO2019182684A5 (https=) 2022-01-31
JP2021518627A5 JP2021518627A5 (https=) 2022-01-31
JP7093419B2 true JP7093419B2 (ja) 2022-06-29

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JP2020550668A Active JP7093419B2 (ja) 2018-03-23 2019-01-28 不揮発性メモリアレイにおけるピーク電力需要及びノイズを管理するためのシステム及び方法

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US (1) US10580491B2 (https=)
EP (1) EP3769307B1 (https=)
JP (1) JP7093419B2 (https=)
KR (1) KR102282580B1 (https=)
CN (1) CN111919255A (https=)
TW (1) TWI685848B (https=)
WO (1) WO2019182684A2 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021150497A (ja) * 2020-03-19 2021-09-27 キオクシア株式会社 記憶装置
US11943922B1 (en) * 2023-11-11 2024-03-26 Western Digital Technologies, Inc. Non-volatile memory with three dimensional stacked word line switches

Citations (5)

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US20120039131A1 (en) 2010-08-12 2012-02-16 Yield Microelectronics Corp. Low-voltage eeprom array
JP2012069203A (ja) 2010-09-22 2012-04-05 Toshiba Corp 不揮発性半導体記憶装置及び不揮発性半導体記憶装置の駆動方法
JP2015170368A (ja) 2014-03-04 2015-09-28 株式会社東芝 演算制御装置、それを備えたメモリシステム、情報処理装置、および、演算制御方法
JP2016162470A (ja) 2015-03-02 2016-09-05 株式会社東芝 半導体記憶装置及びメモリシステム
WO2017200883A1 (en) 2016-05-17 2017-11-23 Silicon Storage Technology, Inc. Deep learning neural network classifier using non-volatile memory array

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US5029130A (en) 1990-01-22 1991-07-02 Silicon Storage Technology, Inc. Single transistor non-valatile electrically alterable semiconductor memory device
JP3337564B2 (ja) 1994-09-16 2002-10-21 松下電器産業株式会社 半導体記憶装置
US6404670B2 (en) 1996-05-24 2002-06-11 Uniram Technology, Inc. Multiple ports memory-cell structure
US6256224B1 (en) * 2000-05-03 2001-07-03 Hewlett-Packard Co Write circuit for large MRAM arrays
US7315056B2 (en) 2004-06-07 2008-01-01 Silicon Storage Technology, Inc. Semiconductor memory array of floating gate memory cells with program/erase and select gates
JP2006004514A (ja) 2004-06-17 2006-01-05 Matsushita Electric Ind Co Ltd 半導体記憶装置
US20090039410A1 (en) 2007-08-06 2009-02-12 Xian Liu Split Gate Non-Volatile Flash Memory Cell Having A Floating Gate, Control Gate, Select Gate And An Erase Gate With An Overhang Over The Floating Gate, Array And Method Of Manufacturing
KR20100120517A (ko) 2009-05-06 2010-11-16 삼성전자주식회사 불휘발성 메모리 장치 및 그것의 워드 라인 또는 비트 라인의 제어방법
US7868657B1 (en) * 2009-07-22 2011-01-11 Qualcomm, Incorporated High voltage logic circuits
CN102859603A (zh) * 2010-04-27 2013-01-02 莫塞德技术公司 具有交替选择的相变存储阵列块
US8400864B1 (en) 2011-11-01 2013-03-19 Apple Inc. Mechanism for peak power management in a memory
US10541029B2 (en) * 2012-08-01 2020-01-21 Micron Technology, Inc. Partial block memory operations
WO2014129172A1 (ja) * 2013-02-19 2014-08-28 パナソニック株式会社 不揮発性半導体記憶装置
JP2014170599A (ja) * 2013-03-01 2014-09-18 Toshiba Corp 半導体記憶装置
US20150155039A1 (en) * 2013-12-02 2015-06-04 Silicon Storage Technology, Inc. Three-Dimensional Flash NOR Memory System With Configurable Pins
US9672930B2 (en) * 2015-05-29 2017-06-06 Silicon Storage Technology, Inc. Low power operation for flash memory system
KR102469172B1 (ko) * 2016-03-14 2022-11-22 에스케이하이닉스 주식회사 비휘발성 메모리 장치 및 이의 검증 라이트 방법
KR102493814B1 (ko) * 2016-06-29 2023-02-02 에스케이하이닉스 주식회사 메모리 장치

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120039131A1 (en) 2010-08-12 2012-02-16 Yield Microelectronics Corp. Low-voltage eeprom array
JP2012069203A (ja) 2010-09-22 2012-04-05 Toshiba Corp 不揮発性半導体記憶装置及び不揮発性半導体記憶装置の駆動方法
JP2015170368A (ja) 2014-03-04 2015-09-28 株式会社東芝 演算制御装置、それを備えたメモリシステム、情報処理装置、および、演算制御方法
JP2016162470A (ja) 2015-03-02 2016-09-05 株式会社東芝 半導体記憶装置及びメモリシステム
WO2017200883A1 (en) 2016-05-17 2017-11-23 Silicon Storage Technology, Inc. Deep learning neural network classifier using non-volatile memory array

Also Published As

Publication number Publication date
CN111919255A (zh) 2020-11-10
TWI685848B (zh) 2020-02-21
WO2019182684A3 (en) 2020-05-14
EP3769307A2 (en) 2021-01-27
KR102282580B1 (ko) 2021-07-28
KR20200102520A (ko) 2020-08-31
EP3769307B1 (en) 2023-11-08
WO2019182684A2 (en) 2019-09-26
US10580491B2 (en) 2020-03-03
EP3769307A4 (en) 2021-11-03
JP2021518627A (ja) 2021-08-02
TW201941210A (zh) 2019-10-16
US20190295647A1 (en) 2019-09-26

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