KR102282580B1 - 비휘발성 메모리 어레이에서 피크 전력 요구 및 잡음을 관리하기 위한 시스템 및 방법 - Google Patents

비휘발성 메모리 어레이에서 피크 전력 요구 및 잡음을 관리하기 위한 시스템 및 방법 Download PDF

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KR102282580B1
KR102282580B1 KR1020207023530A KR20207023530A KR102282580B1 KR 102282580 B1 KR102282580 B1 KR 102282580B1 KR 1020207023530 A KR1020207023530 A KR 1020207023530A KR 20207023530 A KR20207023530 A KR 20207023530A KR 102282580 B1 KR102282580 B1 KR 102282580B1
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line switches
word line
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time point
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KR20200102520A (ko
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비핀 티와리
휴 반 트란
난 도
마크 라이텐
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실리콘 스토리지 테크놀로지 인크
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0425Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/08Address circuits; Decoders; Word-line control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/24Bit-line control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/32Timing circuits
    • H01L27/11524
    • H01L27/11526
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/681Floating-gate IGFETs having only two programming levels
    • H10D30/684Floating-gate IGFETs having only two programming levels programmed by hot carrier injection
    • H10D30/685Floating-gate IGFETs having only two programming levels programmed by hot carrier injection from the channel
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/6891Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
    • H10D30/6892Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode having at least one additional gate other than the floating gate and the control gate, e.g. program gate, erase gate or select gate
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/10Decoders
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/12Group selection circuits, e.g. for memory block selection, chip selection, array selection

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
KR1020207023530A 2018-03-23 2019-01-28 비휘발성 메모리 어레이에서 피크 전력 요구 및 잡음을 관리하기 위한 시스템 및 방법 Active KR102282580B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201862647573P 2018-03-23 2018-03-23
US62/647,573 2018-03-23
US16/015,020 US10580491B2 (en) 2018-03-23 2018-06-21 System and method for managing peak power demand and noise in non-volatile memory array
US16/015,020 2018-06-21
PCT/US2019/015369 WO2019182684A2 (en) 2018-03-23 2019-01-28 System and method for managing peak power demand and noise in non-volatile memory array

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KR20200102520A KR20200102520A (ko) 2020-08-31
KR102282580B1 true KR102282580B1 (ko) 2021-07-28

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US (1) US10580491B2 (https=)
EP (1) EP3769307B1 (https=)
JP (1) JP7093419B2 (https=)
KR (1) KR102282580B1 (https=)
CN (1) CN111919255A (https=)
TW (1) TWI685848B (https=)
WO (1) WO2019182684A2 (https=)

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JP2021150497A (ja) * 2020-03-19 2021-09-27 キオクシア株式会社 記憶装置
US11943922B1 (en) * 2023-11-11 2024-03-26 Western Digital Technologies, Inc. Non-volatile memory with three dimensional stacked word line switches

Citations (1)

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US20050269622A1 (en) 2004-06-07 2005-12-08 Pavel Klinger Semiconductor memory array of floating gate memory cells with program/erase and select gates, and methods of making and operating same

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KR20100120517A (ko) 2009-05-06 2010-11-16 삼성전자주식회사 불휘발성 메모리 장치 및 그것의 워드 라인 또는 비트 라인의 제어방법
US7868657B1 (en) * 2009-07-22 2011-01-11 Qualcomm, Incorporated High voltage logic circuits
CN102859603A (zh) * 2010-04-27 2013-01-02 莫塞德技术公司 具有交替选择的相变存储阵列块
US8305808B2 (en) 2010-08-12 2012-11-06 Yield Microelectronics Corp. Low-voltage EEPROM array
JP2012069203A (ja) 2010-09-22 2012-04-05 Toshiba Corp 不揮発性半導体記憶装置及び不揮発性半導体記憶装置の駆動方法
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WO2014129172A1 (ja) * 2013-02-19 2014-08-28 パナソニック株式会社 不揮発性半導体記憶装置
JP2014170599A (ja) * 2013-03-01 2014-09-18 Toshiba Corp 半導体記憶装置
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Publication number Publication date
CN111919255A (zh) 2020-11-10
TWI685848B (zh) 2020-02-21
WO2019182684A3 (en) 2020-05-14
EP3769307A2 (en) 2021-01-27
KR20200102520A (ko) 2020-08-31
EP3769307B1 (en) 2023-11-08
WO2019182684A2 (en) 2019-09-26
US10580491B2 (en) 2020-03-03
EP3769307A4 (en) 2021-11-03
JP2021518627A (ja) 2021-08-02
TW201941210A (zh) 2019-10-16
US20190295647A1 (en) 2019-09-26
JP7093419B2 (ja) 2022-06-29

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