JP7010633B2 - 半導体製造装置および半導体装置の製造方法 - Google Patents

半導体製造装置および半導体装置の製造方法 Download PDF

Info

Publication number
JP7010633B2
JP7010633B2 JP2017178969A JP2017178969A JP7010633B2 JP 7010633 B2 JP7010633 B2 JP 7010633B2 JP 2017178969 A JP2017178969 A JP 2017178969A JP 2017178969 A JP2017178969 A JP 2017178969A JP 7010633 B2 JP7010633 B2 JP 7010633B2
Authority
JP
Japan
Prior art keywords
die
region
lighting device
image pickup
illuminates
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2017178969A
Other languages
English (en)
Japanese (ja)
Other versions
JP2019054203A5 (zh
JP2019054203A (ja
Inventor
英晴 小橋
Original Assignee
ファスフォードテクノロジ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ファスフォードテクノロジ株式会社 filed Critical ファスフォードテクノロジ株式会社
Priority to JP2017178969A priority Critical patent/JP7010633B2/ja
Priority to TW107130824A priority patent/TWI678746B/zh
Priority to KR1020180105215A priority patent/KR102130386B1/ko
Priority to CN201811090665.0A priority patent/CN109524320B/zh
Publication of JP2019054203A publication Critical patent/JP2019054203A/ja
Publication of JP2019054203A5 publication Critical patent/JP2019054203A5/ja
Application granted granted Critical
Publication of JP7010633B2 publication Critical patent/JP7010633B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67121—Apparatus for making assemblies not otherwise provided for, e.g. package constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67288—Monitoring of warpage, curvature, damage, defects or the like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Die Bonding (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Wire Bonding (AREA)
JP2017178969A 2017-09-19 2017-09-19 半導体製造装置および半導体装置の製造方法 Active JP7010633B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2017178969A JP7010633B2 (ja) 2017-09-19 2017-09-19 半導体製造装置および半導体装置の製造方法
TW107130824A TWI678746B (zh) 2017-09-19 2018-09-03 半導體製造裝置以及半導體裝置的製造方法
KR1020180105215A KR102130386B1 (ko) 2017-09-19 2018-09-04 반도체 제조 장치 및 반도체 장치의 제조 방법
CN201811090665.0A CN109524320B (zh) 2017-09-19 2018-09-18 半导体制造装置及半导体器件的制造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2017178969A JP7010633B2 (ja) 2017-09-19 2017-09-19 半導体製造装置および半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JP2019054203A JP2019054203A (ja) 2019-04-04
JP2019054203A5 JP2019054203A5 (zh) 2020-08-13
JP7010633B2 true JP7010633B2 (ja) 2022-01-26

Family

ID=65770976

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017178969A Active JP7010633B2 (ja) 2017-09-19 2017-09-19 半導体製造装置および半導体装置の製造方法

Country Status (4)

Country Link
JP (1) JP7010633B2 (zh)
KR (1) KR102130386B1 (zh)
CN (1) CN109524320B (zh)
TW (1) TWI678746B (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7151642B2 (ja) * 2019-06-28 2022-10-12 住友電気工業株式会社 面発光レーザ、その製造方法およびその検査方法
JP7377655B2 (ja) * 2019-09-19 2023-11-10 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
JP7437987B2 (ja) * 2020-03-23 2024-02-26 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法
CN112992692B (zh) * 2021-05-19 2021-07-20 佛山市联动科技股份有限公司 一种全自动切割引线的方法及系统
JP2022182232A (ja) * 2021-05-28 2022-12-08 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003185593A (ja) 2001-12-21 2003-07-03 Nec Electronics Corp ウェーハ外観検査装置
WO2005119227A1 (ja) 2004-06-04 2005-12-15 Tokyo Seimitsu Co., Ltd. 半導体外観検査装置及び照明方法
JP2017117916A (ja) 2015-12-24 2017-06-29 ファスフォードテクノロジ株式会社 半導体製造装置および半導体装置の製造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5538003A (en) * 1978-09-08 1980-03-17 Hitachi Ltd Rectilinear pattern detecting device
TWI412736B (zh) * 2009-12-04 2013-10-21 Delta Electronics Inc 基板內部缺陷檢查裝置及方法
US8766192B2 (en) * 2010-11-01 2014-07-01 Asm Assembly Automation Ltd Method for inspecting a photovoltaic substrate
WO2012081587A1 (ja) * 2010-12-14 2012-06-21 株式会社ニコン 検査方法、検査装置、露光管理方法、露光システムおよび半導体デバイス
JP5277266B2 (ja) * 2011-02-18 2013-08-28 株式会社日立ハイテクインスツルメンツ ダイボンダ及び半導体製造方法
JP2013197226A (ja) * 2012-03-19 2013-09-30 Hitachi High-Tech Instruments Co Ltd ダイボンディング方法及びダイボンダ
JP2014060249A (ja) * 2012-09-18 2014-04-03 Hitachi High-Tech Instruments Co Ltd ダイボンダ、および、ダイの位置認識方法
KR101431917B1 (ko) * 2012-12-27 2014-08-27 삼성전기주식회사 반도체 패키지의 검사장비
TWI570823B (zh) * 2013-08-14 2017-02-11 新川股份有限公司 半導體製造裝置以及半導體裝置的製造方法
KR101981182B1 (ko) * 2014-12-05 2019-05-22 가부시키가이샤 알박 기판 감시장치 및 기판 감시방법
JP6669523B2 (ja) * 2016-02-15 2020-03-18 ファスフォードテクノロジ株式会社 ダイボンダおよび半導体装置の製造方法
JP6683500B2 (ja) * 2016-02-24 2020-04-22 株式会社ディスコ 検査装置及びレーザー加工装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003185593A (ja) 2001-12-21 2003-07-03 Nec Electronics Corp ウェーハ外観検査装置
WO2005119227A1 (ja) 2004-06-04 2005-12-15 Tokyo Seimitsu Co., Ltd. 半導体外観検査装置及び照明方法
JP2017117916A (ja) 2015-12-24 2017-06-29 ファスフォードテクノロジ株式会社 半導体製造装置および半導体装置の製造方法

Also Published As

Publication number Publication date
TWI678746B (zh) 2019-12-01
JP2019054203A (ja) 2019-04-04
KR102130386B1 (ko) 2020-07-06
TW201929113A (zh) 2019-07-16
CN109524320B (zh) 2023-03-24
CN109524320A (zh) 2019-03-26
KR20190032195A (ko) 2019-03-27

Similar Documents

Publication Publication Date Title
JP7010633B2 (ja) 半導体製造装置および半導体装置の製造方法
KR102100889B1 (ko) 다이 본딩 장치 및 반도체 장치의 제조 방법
TWI624887B (zh) 半導體製造裝置及半導體裝置的製造方法
JP7102271B2 (ja) 半導体製造装置および半導体装置の製造方法
JP7225337B2 (ja) 半導体製造装置および半導体装置の製造方法
JP7029900B2 (ja) ダイボンディング装置および半導体装置の製造方法
JP2022098312A (ja) ダイボンディング装置および半導体装置の製造方法
CN113436986B (zh) 芯片贴装装置及半导体器件的制造方法
KR102304880B1 (ko) 반도체 제조 장치 및 반도체 장치의 제조 방법
TWI823297B (zh) 黏晶裝置及半導體裝置的製造方法
JP7502108B2 (ja) ダイボンディング装置および半導体装置の製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20200620

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20200620

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20210520

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20210629

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20210819

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20211221

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20220113

R150 Certificate of patent or registration of utility model

Ref document number: 7010633

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150