JP7005369B2 - 薬液塗布装置および半導体デバイスの製造方法 - Google Patents
薬液塗布装置および半導体デバイスの製造方法 Download PDFInfo
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- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02115—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material being carbon, e.g. alpha-C, diamond or hydrogen doped carbon
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- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
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- H01L21/67005—Apparatus not specifically provided for elsewhere
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- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
- H01L21/67748—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber horizontal transfer of a single workpiece
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
- H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
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- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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Description
図1~図7を用い、実施形態1および変形例について説明する。
図1は、実施形態1にかかる薬液塗布装置1の全体構成を示す図である。薬液塗布装置1は、基板としてのウェハW上に薬液を塗布して塗布膜を形成する。塗布膜は、例えば、膜厚100nm程度のSOC(Spin On Carbon)膜である。
次に、図2~図4を用いて検出部30の構成について説明する。図2は、実施形態1にかかる薬液塗布装置1の検出部30の構成例を示す図である。
次に、図5を用いて塗布部50の構成について説明する。図5は、実施形態1にかかる薬液塗布装置1の塗布部50の構成例を示す図である。塗布部50は、スピンコーティング法によってウェハW上に、例えばSOC膜を形成する。
次に、図6を用い、薬液塗布装置1における半導体デバイスの製造処理の一処理としての薬液塗布処理の例について説明する。図6は、実施形態1にかかる薬液塗布装置1における薬液塗布処理の手順の一例を示すフローチャートである。
ここで、実施形態1の薬液塗布装置1の効果を説明するため、図7を用い、実施形態1の薬液塗布装置1と比較例の薬液塗布装置との比較を行う。図7は、実施形態1にかかる薬液塗布装置1と、比較例にかかる薬液塗布装置とによりSOC膜が形成された場合の模式図である。図7左側が、実施形態1の薬液塗布装置1の例、右側が比較例の薬液塗布装置の例である。
次に、実施形態1の変形例の薬液塗布装置について説明する。変形例の薬液塗布装置では、ウェハWのマークがスクライブラインSLである点が、実施形態1の薬液塗布装置1と異なる。
図8~図10を用い、実施形態2について説明する。
Claims (5)
- スピナにより基板を回転させた状態で、前記基板に薬液を塗布し、前記基板のエッジの前記薬液を除去する薬液塗布装置であって、
前記基板上のマークの位置を検出する検出部と、
前記スピナ上に前記基板を搬送する搬送部と、
前記マークの位置から前記基板におけるショットマップの中心位置を算出し、前記搬送部が前記スピナ上に前記基板を搬送するときに、前記搬送部を制御して前記ショットマップの中心位置を前記スピナの回転中心と一致させる制御部と、を備える、
薬液塗布装置。 - 前記検出部は前記搬送部に設けられている、
請求項1に記載の薬液塗布装置。 - 前記基板に前記薬液が塗布される前に前記基板の温度を調節する温度調節部を備え、
前記検出部は前記温度調節部に設けられている、
請求項1に記載の薬液塗布装置。 - 前記マークは、前記基板のショット間のスクライブラインである、
請求項1乃至請求項3のいずれか1項に記載の薬液塗布装置。 - スピナにより基板を回転させた状態で、前記基板に薬液を塗布し、前記基板のエッジの前記薬液を除去する薬液塗布装置で実施される半導体デバイスの製造方法であって、
前記基板上のマークの位置を検出する検出ステップと、
前記マークの位置から前記基板におけるショットマップの中心位置を算出する算出ステップと、
前記スピナ上に前記基板を搬送するときに、前記ショットマップの中心位置を前記スピナの回転中心と一致させる搬送ステップと、を含む、
半導体デバイスの製造方法。
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JP2018018539A JP7005369B2 (ja) | 2018-02-05 | 2018-02-05 | 薬液塗布装置および半導体デバイスの製造方法 |
US16/104,176 US20190244809A1 (en) | 2018-02-05 | 2018-08-17 | Chemical liquid application apparatus and manufacturing method of semiconductor device |
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JP2018018539A JP7005369B2 (ja) | 2018-02-05 | 2018-02-05 | 薬液塗布装置および半導体デバイスの製造方法 |
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JP2019135755A JP2019135755A (ja) | 2019-08-15 |
JP7005369B2 true JP7005369B2 (ja) | 2022-01-21 |
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JP2022507368A (ja) | 2018-11-14 | 2022-01-18 | ラム リサーチ コーポレーション | 次世代リソグラフィにおいて有用なハードマスクを作製する方法 |
CN113785381A (zh) | 2019-04-30 | 2021-12-10 | 朗姆研究公司 | 用于极紫外光刻抗蚀剂改善的原子层蚀刻及选择性沉积处理 |
TWI837391B (zh) | 2019-06-26 | 2024-04-01 | 美商蘭姆研究公司 | 利用鹵化物化學品的光阻顯影 |
US11107678B2 (en) * | 2019-11-26 | 2021-08-31 | Canon Kabushiki Kaisha | Wafer process, apparatus and method of manufacturing an article |
JP7189375B2 (ja) | 2020-01-15 | 2022-12-13 | ラム リサーチ コーポレーション | フォトレジスト接着および線量低減のための下層 |
Citations (3)
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US20040128630A1 (en) | 2002-12-30 | 2004-07-01 | Mark Ward | Optimization of die yield in a silicon wafer "sweet spot" |
JP2009038411A (ja) | 2003-12-04 | 2009-02-19 | Hirata Corp | 基板位置決めシステム |
JP2015211205A (ja) | 2014-04-30 | 2015-11-24 | 株式会社Screenホールディングス | 基板処理装置および基板処理方法 |
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JPH10256350A (ja) * | 1997-03-06 | 1998-09-25 | Toshiba Corp | 半導体製造方法及びその装置 |
TW200745771A (en) * | 2006-02-17 | 2007-12-16 | Nikon Corp | Adjustment method, substrate processing method, substrate processing apparatus, exposure apparatus, inspection apparatus, measurement and/or inspection system, processing apparatus, computer system, program and information recording medium |
JP4927158B2 (ja) * | 2009-12-25 | 2012-05-09 | 東京エレクトロン株式会社 | 基板処理方法、その基板処理方法を実行させるためのプログラムを記録した記録媒体及び基板処理装置 |
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- 2018-02-05 JP JP2018018539A patent/JP7005369B2/ja active Active
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Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040128630A1 (en) | 2002-12-30 | 2004-07-01 | Mark Ward | Optimization of die yield in a silicon wafer "sweet spot" |
JP2009038411A (ja) | 2003-12-04 | 2009-02-19 | Hirata Corp | 基板位置決めシステム |
JP2015211205A (ja) | 2014-04-30 | 2015-11-24 | 株式会社Screenホールディングス | 基板処理装置および基板処理方法 |
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