JP6973922B2 - ウェーハの加工方法 - Google Patents

ウェーハの加工方法 Download PDF

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Publication number
JP6973922B2
JP6973922B2 JP2017173192A JP2017173192A JP6973922B2 JP 6973922 B2 JP6973922 B2 JP 6973922B2 JP 2017173192 A JP2017173192 A JP 2017173192A JP 2017173192 A JP2017173192 A JP 2017173192A JP 6973922 B2 JP6973922 B2 JP 6973922B2
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JP
Japan
Prior art keywords
wafer
cutting groove
sealing material
alignment
encapsulant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2017173192A
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English (en)
Japanese (ja)
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JP2019050265A (ja
Inventor
克彦 鈴木
祐人 伴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Disco Corp
Original Assignee
Disco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Disco Corp filed Critical Disco Corp
Priority to JP2017173192A priority Critical patent/JP6973922B2/ja
Priority to KR1020180104537A priority patent/KR102581128B1/ko
Priority to TW107131226A priority patent/TWI766090B/zh
Priority to CN201811035751.1A priority patent/CN109473350B/zh
Priority to DE102018215253.5A priority patent/DE102018215253A1/de
Priority to SG10201807755TA priority patent/SG10201807755TA/en
Publication of JP2019050265A publication Critical patent/JP2019050265A/ja
Application granted granted Critical
Publication of JP6973922B2 publication Critical patent/JP6973922B2/ja
Active legal-status Critical Current
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Dicing (AREA)
  • Laser Beam Processing (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
JP2017173192A 2017-09-08 2017-09-08 ウェーハの加工方法 Active JP6973922B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2017173192A JP6973922B2 (ja) 2017-09-08 2017-09-08 ウェーハの加工方法
KR1020180104537A KR102581128B1 (ko) 2017-09-08 2018-09-03 웨이퍼의 가공 방법
TW107131226A TWI766090B (zh) 2017-09-08 2018-09-06 晶圓之加工方法
CN201811035751.1A CN109473350B (zh) 2017-09-08 2018-09-06 晶片的加工方法
DE102018215253.5A DE102018215253A1 (de) 2017-09-08 2018-09-07 Bearbeitungsverfahren für einen wafer
SG10201807755TA SG10201807755TA (en) 2017-09-08 2018-09-07 Wafer processing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2017173192A JP6973922B2 (ja) 2017-09-08 2017-09-08 ウェーハの加工方法

Publications (2)

Publication Number Publication Date
JP2019050265A JP2019050265A (ja) 2019-03-28
JP6973922B2 true JP6973922B2 (ja) 2021-12-01

Family

ID=65441538

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017173192A Active JP6973922B2 (ja) 2017-09-08 2017-09-08 ウェーハの加工方法

Country Status (6)

Country Link
JP (1) JP6973922B2 (ko)
KR (1) KR102581128B1 (ko)
CN (1) CN109473350B (ko)
DE (1) DE102018215253A1 (ko)
SG (1) SG10201807755TA (ko)
TW (1) TWI766090B (ko)

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AUPR244801A0 (en) * 2001-01-10 2001-02-01 Silverbrook Research Pty Ltd A method and apparatus (WSM01)
JP2003165893A (ja) * 2001-11-30 2003-06-10 Shin Etsu Chem Co Ltd 半導体封止用エポキシ樹脂組成物及び半導体装置
JP2003321594A (ja) * 2002-04-26 2003-11-14 Hitachi Chem Co Ltd 封止用エポキシ樹脂成形材料及び電子部品装置
JP2007190596A (ja) * 2006-01-20 2007-08-02 Seiko Epson Corp 基体の製造方法、フレキシブル回路基板、電気光学装置、電子機器
JP5948034B2 (ja) 2011-09-27 2016-07-06 株式会社ディスコ アライメント方法
KR20130059291A (ko) * 2011-11-28 2013-06-05 닛토덴코 가부시키가이샤 언더필재 및 반도체 장치의 제조 방법
JP2014003274A (ja) * 2012-05-25 2014-01-09 Nitto Denko Corp 半導体装置の製造方法及びアンダーフィル材
KR102215918B1 (ko) * 2013-03-27 2021-02-16 하마마츠 포토닉스 가부시키가이샤 레이저 가공 장치 및 레이저 가공 방법
JP2015023078A (ja) * 2013-07-17 2015-02-02 株式会社ディスコ ウエーハの加工方法
JP6066854B2 (ja) * 2013-07-30 2017-01-25 株式会社ディスコ ウエーハの加工方法
JP2016015438A (ja) 2014-07-03 2016-01-28 株式会社ディスコ アライメント方法
JP2016082195A (ja) * 2014-10-22 2016-05-16 Ｔｏｗａ株式会社 切断装置及び切断方法
JP2016166120A (ja) * 2015-03-06 2016-09-15 三星ダイヤモンド工業株式会社 積層基板の加工方法及びレーザ光による積層基板の加工装置
JP2016225371A (ja) * 2015-05-27 2016-12-28 株式会社ディスコ ウェーハの分割方法
JP2017108089A (ja) * 2015-12-04 2017-06-15 株式会社東京精密 レーザ加工装置及びレーザ加工方法
JP2017103405A (ja) * 2015-12-04 2017-06-08 株式会社ディスコ ウエーハの加工方法
JP2017107984A (ja) * 2015-12-09 2017-06-15 株式会社ディスコ ウエーハの加工方法
JP6608694B2 (ja) * 2015-12-25 2019-11-20 株式会社ディスコ ウエーハの加工方法

Also Published As

Publication number Publication date
JP2019050265A (ja) 2019-03-28
TW201913776A (zh) 2019-04-01
SG10201807755TA (en) 2019-04-29
TWI766090B (zh) 2022-06-01
CN109473350B (zh) 2023-10-10
DE102018215253A1 (de) 2019-03-14
CN109473350A (zh) 2019-03-15
KR20190028312A (ko) 2019-03-18
KR102581128B1 (ko) 2023-09-20

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