JP6916448B2 - 低電力及び高性能ｓｒａｍにおける感知増幅器 - Google Patents

低電力及び高性能ｓｒａｍにおける感知増幅器 Download PDF

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JP6916448B2
JP6916448B2 JP2018547865A JP2018547865A JP6916448B2 JP 6916448 B2 JP6916448 B2 JP 6916448B2 JP 2018547865 A JP2018547865 A JP 2018547865A JP 2018547865 A JP2018547865 A JP 2018547865A JP 6916448 B2 JP6916448 B2 JP 6916448B2
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transistor
storage cell
sram
read
body bias
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JP2019500714A5 (https=
JP2019500714A (ja
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メネージズ ヴィノッド
メネージズ ヴィノッド
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テキサス インスツルメンツ インコーポレイテッド
テキサス インスツルメンツ インコーポレイテッド
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/065—Differential amplifiers of latching type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Static Random-Access Memory (AREA)
JP2018547865A 2015-11-30 2016-11-30 低電力及び高性能ｓｒａｍにおける感知増幅器 Active JP6916448B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/954,481 2015-11-30
US14/954,481 US9799395B2 (en) 2015-11-30 2015-11-30 Sense amplifier in low power and high performance SRAM
PCT/US2016/064183 WO2017095902A1 (en) 2015-11-30 2016-11-30 Sense amplifier in low power and high performance sram

Publications (3)

Publication Number Publication Date
JP2019500714A JP2019500714A (ja) 2019-01-10
JP2019500714A5 JP2019500714A5 (https=) 2020-01-09
JP6916448B2 true JP6916448B2 (ja) 2021-08-11

Family

ID=58777720

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2018547865A Active JP6916448B2 (ja) 2015-11-30 2016-11-30 低電力及び高性能ｓｒａｍにおける感知増幅器

Country Status (5)

Country Link
US (2) US9799395B2 (https=)
EP (1) EP3384496B1 (https=)
JP (1) JP6916448B2 (https=)
CN (1) CN108352175B (https=)
WO (1) WO2017095902A1 (https=)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9847133B2 (en) 2016-01-19 2017-12-19 Ememory Technology Inc. Memory array capable of performing byte erase operation
KR102444390B1 (ko) * 2017-10-23 2022-09-19 현대자동차주식회사 차량, 차량 보안 시스템 및 차량 보안 방법
JP2020027674A (ja) * 2018-08-10 2020-02-20 キオクシア株式会社 半導体メモリ
US10418093B1 (en) * 2018-08-31 2019-09-17 Micron Technology, Inc. DRAM sense amplifier active matching fill features for gap equivalence systems and methods
US11081167B1 (en) * 2020-06-26 2021-08-03 Sandisk Technologies Llc Sense amplifier architecture for low supply voltage operations
US11990179B2 (en) 2020-10-14 2024-05-21 Samsung Electronics Co., Ltd. Memory device using a plurality of supply voltages and operating method thereof
US12176025B2 (en) * 2021-07-09 2024-12-24 Stmicroelectronics International N.V. Adaptive body bias management for an in-memory compute operation where simultaneous access is made to plural rows of a static random access memory (SRAM)
JP7502513B1 (ja) 2023-03-28 2024-06-18 華邦電子股▲ふん▼有限公司 半導体記憶装置、制御方法及び制御装置
JP7515653B1 (ja) 2023-04-07 2024-07-12 華邦電子股▲ふん▼有限公司 半導体記憶装置及びその制御方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1027476A (ja) * 1996-04-08 1998-01-27 Texas Instr Inc <Ti> Ｓｒａｍセル
US6807118B2 (en) * 2003-01-23 2004-10-19 Hewlett-Packard Development Company, L.P. Adjustable offset differential amplifier
KR100542710B1 (ko) * 2003-10-02 2006-01-11 주식회사 하이닉스반도체 차동 증폭기 및 이를 채용한 비트라인 센스 증폭기
US7338817B2 (en) 2005-03-31 2008-03-04 Intel Corporation Body bias compensation for aged transistors
US7330388B1 (en) 2005-09-23 2008-02-12 Cypress Semiconductor Corporation Sense amplifier circuit and method of operation
US7333379B2 (en) * 2006-01-12 2008-02-19 International Business Machines Corporation Balanced sense amplifier circuits with adjustable transistor body bias
KR100735754B1 (ko) * 2006-02-03 2007-07-06 삼성전자주식회사 센스 앰프 플립 플롭
US8362807B2 (en) * 2010-10-13 2013-01-29 Taiwan Semiconductor Manufacturing Company, Ltd. Offset compensation for sense amplifiers

Also Published As

Publication number Publication date
US9799395B2 (en) 2017-10-24
EP3384496A4 (en) 2018-12-12
US10008261B2 (en) 2018-06-26
CN108352175B (zh) 2022-05-24
EP3384496B1 (en) 2021-08-25
CN108352175A (zh) 2018-07-31
JP2019500714A (ja) 2019-01-10
WO2017095902A1 (en) 2017-06-08
EP3384496A1 (en) 2018-10-10
US20180005693A1 (en) 2018-01-04
US20170154672A1 (en) 2017-06-01

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