CN108352175B - 低功率高性能sram中的感测放大器 - Google Patents
低功率高性能sram中的感测放大器 Download PDFInfo
- Publication number
- CN108352175B CN108352175B CN201680064174.1A CN201680064174A CN108352175B CN 108352175 B CN108352175 B CN 108352175B CN 201680064174 A CN201680064174 A CN 201680064174A CN 108352175 B CN108352175 B CN 108352175B
- Authority
- CN
- China
- Prior art keywords
- transistor
- memory cell
- read
- sense amplifier
- body bias
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
- G11C7/065—Differential amplifiers of latching type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/954,481 | 2015-11-30 | ||
| US14/954,481 US9799395B2 (en) | 2015-11-30 | 2015-11-30 | Sense amplifier in low power and high performance SRAM |
| PCT/US2016/064183 WO2017095902A1 (en) | 2015-11-30 | 2016-11-30 | Sense amplifier in low power and high performance sram |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108352175A CN108352175A (zh) | 2018-07-31 |
| CN108352175B true CN108352175B (zh) | 2022-05-24 |
Family
ID=58777720
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201680064174.1A Active CN108352175B (zh) | 2015-11-30 | 2016-11-30 | 低功率高性能sram中的感测放大器 |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US9799395B2 (https=) |
| EP (1) | EP3384496B1 (https=) |
| JP (1) | JP6916448B2 (https=) |
| CN (1) | CN108352175B (https=) |
| WO (1) | WO2017095902A1 (https=) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9847133B2 (en) | 2016-01-19 | 2017-12-19 | Ememory Technology Inc. | Memory array capable of performing byte erase operation |
| KR102444390B1 (ko) * | 2017-10-23 | 2022-09-19 | 현대자동차주식회사 | 차량, 차량 보안 시스템 및 차량 보안 방법 |
| JP2020027674A (ja) * | 2018-08-10 | 2020-02-20 | キオクシア株式会社 | 半導体メモリ |
| US10418093B1 (en) * | 2018-08-31 | 2019-09-17 | Micron Technology, Inc. | DRAM sense amplifier active matching fill features for gap equivalence systems and methods |
| US11081167B1 (en) * | 2020-06-26 | 2021-08-03 | Sandisk Technologies Llc | Sense amplifier architecture for low supply voltage operations |
| US11990179B2 (en) | 2020-10-14 | 2024-05-21 | Samsung Electronics Co., Ltd. | Memory device using a plurality of supply voltages and operating method thereof |
| US12176025B2 (en) * | 2021-07-09 | 2024-12-24 | Stmicroelectronics International N.V. | Adaptive body bias management for an in-memory compute operation where simultaneous access is made to plural rows of a static random access memory (SRAM) |
| JP7502513B1 (ja) | 2023-03-28 | 2024-06-18 | 華邦電子股▲ふん▼有限公司 | 半導体記憶装置、制御方法及び制御装置 |
| JP7515653B1 (ja) | 2023-04-07 | 2024-07-12 | 華邦電子股▲ふん▼有限公司 | 半導体記憶装置及びその制御方法 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW442790B (en) * | 1996-04-08 | 2001-06-23 | Texas Instruments Inc | Low voltage, low power static random access memory cell |
| US7330388B1 (en) * | 2005-09-23 | 2008-02-12 | Cypress Semiconductor Corporation | Sense amplifier circuit and method of operation |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6807118B2 (en) * | 2003-01-23 | 2004-10-19 | Hewlett-Packard Development Company, L.P. | Adjustable offset differential amplifier |
| KR100542710B1 (ko) * | 2003-10-02 | 2006-01-11 | 주식회사 하이닉스반도체 | 차동 증폭기 및 이를 채용한 비트라인 센스 증폭기 |
| US7338817B2 (en) | 2005-03-31 | 2008-03-04 | Intel Corporation | Body bias compensation for aged transistors |
| US7333379B2 (en) * | 2006-01-12 | 2008-02-19 | International Business Machines Corporation | Balanced sense amplifier circuits with adjustable transistor body bias |
| KR100735754B1 (ko) * | 2006-02-03 | 2007-07-06 | 삼성전자주식회사 | 센스 앰프 플립 플롭 |
| US8362807B2 (en) * | 2010-10-13 | 2013-01-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Offset compensation for sense amplifiers |
-
2015
- 2015-11-30 US US14/954,481 patent/US9799395B2/en active Active
-
2016
- 2016-11-30 WO PCT/US2016/064183 patent/WO2017095902A1/en not_active Ceased
- 2016-11-30 CN CN201680064174.1A patent/CN108352175B/zh active Active
- 2016-11-30 JP JP2018547865A patent/JP6916448B2/ja active Active
- 2016-11-30 EP EP16871409.5A patent/EP3384496B1/en active Active
-
2017
- 2017-09-18 US US15/706,901 patent/US10008261B2/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW442790B (en) * | 1996-04-08 | 2001-06-23 | Texas Instruments Inc | Low voltage, low power static random access memory cell |
| US7330388B1 (en) * | 2005-09-23 | 2008-02-12 | Cypress Semiconductor Corporation | Sense amplifier circuit and method of operation |
Also Published As
| Publication number | Publication date |
|---|---|
| US9799395B2 (en) | 2017-10-24 |
| EP3384496A4 (en) | 2018-12-12 |
| US10008261B2 (en) | 2018-06-26 |
| EP3384496B1 (en) | 2021-08-25 |
| JP6916448B2 (ja) | 2021-08-11 |
| CN108352175A (zh) | 2018-07-31 |
| JP2019500714A (ja) | 2019-01-10 |
| WO2017095902A1 (en) | 2017-06-08 |
| EP3384496A1 (en) | 2018-10-10 |
| US20180005693A1 (en) | 2018-01-04 |
| US20170154672A1 (en) | 2017-06-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| TG01 | Patent term adjustment | ||
| TG01 | Patent term adjustment |