JP6878300B2 - マルチモード変調を用いる向上した仮想ｇｐｉｏ - Google Patents

マルチモード変調を用いる向上した仮想ｇｐｉｏ Download PDF

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Publication number
JP6878300B2
JP6878300B2 JP2017553087A JP2017553087A JP6878300B2 JP 6878300 B2 JP6878300 B2 JP 6878300B2 JP 2017553087 A JP2017553087 A JP 2017553087A JP 2017553087 A JP2017553087 A JP 2017553087A JP 6878300 B2 JP6878300 B2 JP 6878300B2
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Prior art keywords
gpio
messaging
bit
signal
pulse width
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Japanese (ja)
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JP2018518083A5 (https=
JP2018518083A (ja
Inventor
ララン・ジー・ミシュラ
リチャード・ウィートフェルト
モヒット・プラサド
ジェームズ・パニアン
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クアルコム，インコーポレイテッド
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1678—Details of memory controller using bus width
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/19—Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Dc Digital Transmission (AREA)
  • Information Transfer Systems (AREA)
  • Magnetic Resonance Imaging Apparatus (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Communication Control (AREA)
JP2017553087A 2015-04-14 2016-04-13 マルチモード変調を用いる向上した仮想ｇｐｉｏ Expired - Fee Related JP6878300B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2021076152A JP2021145338A (ja) 2015-04-14 2021-04-28 マルチモード変調を用いる向上した仮想ｇｐｉｏ

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US201562147238P 2015-04-14 2015-04-14
US62/147,238 2015-04-14
US201562233278P 2015-09-25 2015-09-25
US62/233,278 2015-09-25
US15/097,237 2016-04-12
US15/097,237 US10146727B2 (en) 2015-04-14 2016-04-12 Enhanced virtual GPIO with multi-mode modulation
PCT/US2016/027377 WO2016168369A1 (en) 2015-04-14 2016-04-13 Enhanced virtual gpio with multi-mode modulation

Related Child Applications (1)

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JP2021076152A Division JP2021145338A (ja) 2015-04-14 2021-04-28 マルチモード変調を用いる向上した仮想ｇｐｉｏ

Publications (3)

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JP2018518083A JP2018518083A (ja) 2018-07-05
JP2018518083A5 JP2018518083A5 (https=) 2019-04-25
JP6878300B2 true JP6878300B2 (ja) 2021-05-26

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JP2017553087A Expired - Fee Related JP6878300B2 (ja) 2015-04-14 2016-04-13 マルチモード変調を用いる向上した仮想ｇｐｉｏ
JP2021076152A Pending JP2021145338A (ja) 2015-04-14 2021-04-28 マルチモード変調を用いる向上した仮想ｇｐｉｏ

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Country Link
US (2) US10146727B2 (https=)
EP (2) EP3410306A1 (https=)
JP (2) JP6878300B2 (https=)
KR (1) KR20170137089A (https=)
CN (2) CN112835825A (https=)
AU (1) AU2016250158A1 (https=)
BR (1) BR112017021885A2 (https=)
TW (1) TW201702891A (https=)
WO (1) WO2016168369A1 (https=)

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US20180359117A1 (en) * 2017-06-12 2018-12-13 Qualcomm Incorporated Virtual channel instantiation over vgi/vgmi
US20190050366A1 (en) * 2017-08-14 2019-02-14 Qualcomm Incorporated Device, event and message parameter association in a multi-drop bus
US10355693B1 (en) * 2018-03-14 2019-07-16 Qualcomm Incorporated Extended GPIO (eGPIO)
CN110531146B (zh) * 2019-09-02 2020-11-03 北京智芯微电子科技有限公司 三相载波通信模块的过零检测装置、方法及计算机存储介质
JP2022049407A (ja) * 2020-09-16 2022-03-29 キオクシア株式会社 情報処理システム、ストレージデバイス、およびキャリブレーション方法
US11502712B2 (en) 2021-03-05 2022-11-15 Aspeed Technology Inc. Signal transceiving system and signal receiver thereof
US11960434B2 (en) * 2021-04-07 2024-04-16 Sony Semiconductor Solutions Corporation Communication device, communication system, and communication method for transmitting data blocks including signal groups conforming to a serial peripheral interface
KR102756820B1 (ko) 2021-12-29 2025-01-21 에스케이온 주식회사 절연 통신을 위한 송수신 방법 및 장치
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CN117539819B (zh) * 2024-01-10 2024-06-14 广东保伦电子股份有限公司 使用gpio模拟单线uart串口的方法、装置、设备及存储介质

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US20030061431A1 (en) * 2001-09-21 2003-03-27 Intel Corporation Multiple channel interface for communications between devices
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Also Published As

Publication number Publication date
JP2021145338A (ja) 2021-09-24
KR20170137089A (ko) 2017-12-12
AU2016250158A1 (en) 2017-09-28
CN112835825A (zh) 2021-05-25
TW201702891A (zh) 2017-01-16
EP3283969B1 (en) 2020-05-27
CN107580702B (zh) 2021-03-26
BR112017021885A2 (pt) 2018-07-17
JP2018518083A (ja) 2018-07-05
EP3283969A1 (en) 2018-02-21
WO2016168369A1 (en) 2016-10-20
US10303643B2 (en) 2019-05-28
US20160306770A1 (en) 2016-10-20
US20190087380A1 (en) 2019-03-21
CN107580702A (zh) 2018-01-12
US10146727B2 (en) 2018-12-04
EP3410306A1 (en) 2018-12-05

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