JP6854743B2 - 表示装置 - Google Patents
表示装置 Download PDFInfo
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- JP6854743B2 JP6854743B2 JP2017220142A JP2017220142A JP6854743B2 JP 6854743 B2 JP6854743 B2 JP 6854743B2 JP 2017220142 A JP2017220142 A JP 2017220142A JP 2017220142 A JP2017220142 A JP 2017220142A JP 6854743 B2 JP6854743 B2 JP 6854743B2
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- G06F3/0445—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using two or more layers of sensing electrodes, e.g. using two layers of electrodes separated by a dielectric layer
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- G02B6/0011—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings specially adapted for lighting devices or systems the light guides being planar or of plate-like form
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- G06F2203/04106—Multi-sensing digitiser, i.e. digitiser using at least two different sensing technologies simultaneously or alternatively, e.g. for detecting pen and finger, for saving power or for improving position detection
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- G06F2203/04112—Electrode mesh in capacitive digitiser: electrode for touch sensing is formed of a mesh of very fine, normally metallic, interconnected lines that are almost invisible to see. This provides a quite large but transparent electrode surface, without need for ITO or similar transparent conductive material
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Optics & Photonics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Liquid Crystal (AREA)
- Electromagnetism (AREA)
- Geometry (AREA)
Description
図1は、第1実施形態に係る表示装置の一構成例を示すブロック図である。本実施形態の表示装置1は、被検出体の表示面への接触や近接を検出する検出機能が内蔵されている。図1に示すように、表示装置1は、表示パネル10と、制御部11と、ゲートドライバ12と、ソースドライバ13と、駆動回路14と、検出部40とを備える。
図38は、第2実施形態に係る表示装置の概略断面構造を表す断面図である。図39は、第2実施形態に係るフロントライトの概略断面構造を表す断面図である。なお、上述した第1実施形態で説明したものと同じ構成要素には同一の符号を付して重複する説明は省略する。
(1)第1基板と、表示機能層と、複数の第1電極と、導光板と、複数の第2電極と、前記第1電極及び前記第2電極を制御する制御部と、を備え、
前記第1基板、前記表示機能層、複数の前記第1電極、前記導光板及び複数の前記第2電極は、この順で設けられ、
前記制御部は、画像を表示する複数の表示期間と、第1センサ期間と、第2センサ期間とを時分割で実行し、
前記第1センサ期間には、前記第1電極に第1駆動信号が供給されて、前記第2電極には電磁誘導に基づく起電力が発生し、
前記第2センサ期間には、前記第1電極に第2駆動信号が供給されて前記第1電極と前記第2電極との間で静電容量を形成する、
表示装置。
(2)前記第2電極が設けられたセンサ基体を有し、
前記第2電極は、前記センサ基体と、前記導光板との間に配置される、
上記(1)に記載の表示装置。
(3)前記第1基板と対向する第2基板と、前記第2基板と前記導光板との間に設けられた偏光板と、を有し、
前記導光板と前記偏光板との間、及び前記導光板と前記第2電極との間に、それぞれ接着層が設けられる、
上記(2)に記載の表示装置。
(4)前記導光板は、前記第1基板と対向する第1主面と、前記第1主面の反対側の第2主面とを有し、
前記第2電極は、前記第2主面に設けられる、
上記(1)に記載の表示装置。
(5)前記第2電極に接続されたアナログフロントエンド回路をさらに備えている、
上記(1)乃至上記(4)のいずれか1つに記載の表示装置。
(6)前記表示期間に、前記電磁誘導に基づく起電力に応じた信号が、前記第2電極から前記アナログフロントエンド回路に出力される、
上記(5)に記載の表示装置。
(7)前記第2電極と前記アナログフロントエンド回路の間には、前記第2電極と前記アナログフロントエンド回路の接続状態を切り替えるスイッチ回路が設けられており、
前記スイッチ回路は、
前記第1センサ期間に、少なくとも一対の第2電極の同側の一端部どうしを接続すると共に、当該一対の第2電極のうちの一方の第2電極の他端部と前記アナログフロントエンド回路とを接続し、
前記第2センサ期間には、各前記第2電極と前記アナログフロントエンド回路とを接続する
上記(5)又は上記(6)に記載の表示装置。
(8)前記複数の第1電極のうち、一対の第1電極の同側の端部を接続するスイッチ部が設けられており、
前記制御部は、前記第1センサ期間に、前記スイッチ部の動作により前記一対の第1電極どうしを接続し、前記第1センサ期間とは異なる期間に前記スイッチ部の動作により前記一対の第1電極どうしを非接続状態とする、
上記(1)乃至上記(7)のいずれか1つに記載の表示装置。
(9)前記複数の第1電極に第1電圧を供給する第1電圧供給部と、前記複数の第1電極に前記第1電圧よりも小さい第2電圧を供給する第2電圧供給部と、を備え、
前記第1センサ期間に、少なくとも1つの前記第1電極の一端側に前記第1電圧供給部が接続され、他端側に前記第2電圧供給部が接続され、少なくとも1つの前記第1電極の他の前記第1電極の一端側に前記第2電圧供給部が接続され、他端側に前記第1電圧供給部が接続される、
上記(1)乃至上記(8)のいずれか1つに記載の表示装置。
(10)前記制御部は、前記第2センサ期間において、前記第1電極と前記第2電極との間の静電容量変化に応じた信号の分布に基づいて、被検出体の位置及び検出面に加えられる押力を検出する、
上記(1)乃至上記(9)のいずれか1つに記載の表示装置。
2 画素基板
3 対向基板
6 液晶層
10 表示パネル
11 制御部
12 ゲートドライバ
13 ソースドライバ
14 駆動回路
19 駆動IC
21 第1基板
24 第3電極
25 画素電極
29 平坦化膜
32 カラーフィルタ
40 検出部
47A 第1AFE
47B 第2AFE
48 マルチプレクサ
49 タッチIC
72 接続電極
80 周辺回路領域
81 導通部
90、90A フロントライト
91、95 導光板
92 第1導光板
93 第2導光板
97 センサ基体
100 タッチペン
COML 第1電極
TDL 第2電極
CTx 送信コイル
CRx 受信コイル
SGL 信号線
GCL ゲート線
VTP 第1駆動信号
TSVcom 第2駆動信号
Claims (10)
- 第1基板と、表示機能層と、複数の第1電極と、導光板と、複数の第2電極と、前記第1電極及び前記第2電極を制御する制御部と、を備え、
前記第1基板、前記表示機能層、複数の前記第1電極、前記導光板及び複数の前記第2電極は、この順で設けられ、
前記制御部は、画像を表示する複数の表示期間と、第1センサ期間と、第2センサ期間とを時分割で実行し、
前記第1センサ期間には、前記第1電極に第1駆動信号が供給されて、前記第2電極には電磁誘導に基づく起電力が発生し、
前記第2センサ期間には、前記第1電極に第2駆動信号が供給されて前記第1電極と前記第2電極との間で静電容量を形成する、
表示装置。 - 前記第2電極が設けられたセンサ基体を有し、
前記第2電極は、前記センサ基体と、前記導光板との間に配置される、
請求項1に記載の表示装置。 - 前記第1基板と対向する第2基板と、前記第2基板と前記導光板との間に設けられた偏光板と、を有し、
前記導光板と前記偏光板との間、及び前記導光板と前記第2電極との間に、それぞれ接着層が設けられる、
請求項2に記載の表示装置。 - 前記導光板は、前記第1基板と対向する第1主面と、前記第1主面の反対側の第2主面とを有し、
前記第2電極は、前記第2主面に設けられる、
請求項1に記載の表示装置。 - 前記第2電極に接続されたアナログフロントエンド回路をさらに備えている、
請求項1乃至請求項4のいずれか1項に記載の表示装置。 - 前記表示期間に、前記電磁誘導に基づく起電力に応じた信号が、前記第2電極から前記アナログフロントエンド回路に出力される、
請求項5に記載の表示装置。 - 前記第2電極と前記アナログフロントエンド回路の間には、前記第2電極と前記アナログフロントエンド回路の接続状態を切り替えるスイッチ回路が設けられており、
前記スイッチ回路は、
前記第1センサ期間に、少なくとも一対の第2電極の同側の一端部どうしを接続すると共に、当該一対の第2電極のうちの一方の第2電極の他端部と前記アナログフロントエンド回路とを接続し、
前記第2センサ期間には、各前記第2電極と前記アナログフロントエンド回路とを接続する
請求項5又は請求項6に記載の表示装置。 - 前記複数の第1電極のうち、一対の第1電極の同側の端部を接続するスイッチ部が設けられており、
前記制御部は、前記第1センサ期間に、前記スイッチ部の動作により前記一対の第1電極どうしを接続し、前記第1センサ期間とは異なる期間に前記スイッチ部の動作により前記一対の第1電極どうしを非接続状態とする、
請求項1乃至請求項7のいずれか1項に記載の表示装置。 - 前記複数の第1電極に第1電圧を供給する第1電圧供給部と、前記複数の第1電極に前記第1電圧よりも小さい第2電圧を供給する第2電圧供給部と、を備え、
前記第1センサ期間に、少なくとも1つの前記第1電極の一端側に前記第1電圧供給部が接続され、他端側に前記第2電圧供給部が接続され、少なくとも1つの前記第1電極の他の前記第1電極の一端側に前記第2電圧供給部が接続され、他端側に前記第1電圧供給部が接続される、
請求項1乃至請求項8のいずれか1項に記載の表示装置。 - 前記制御部は、前記第2センサ期間において、前記第1電極と前記第2電極との間の静電容量変化に応じた信号の分布に基づいて、被検出体の位置及び検出面に加えられる押力を検出する、
請求項1乃至請求項9のいずれか1項に記載の表示装置。
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