JP6826214B2 - 酸化物接合ウエハスタックにおけるダイ封入 - Google Patents

酸化物接合ウエハスタックにおけるダイ封入 Download PDF

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JP6826214B2
JP6826214B2 JP2019563579A JP2019563579A JP6826214B2 JP 6826214 B2 JP6826214 B2 JP 6826214B2 JP 2019563579 A JP2019563579 A JP 2019563579A JP 2019563579 A JP2019563579 A JP 2019563579A JP 6826214 B2 JP6826214 B2 JP 6826214B2
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wafer
semiconductor
cavity
integrated circuit
assembly
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JP2020520128A5 (enExample
JP2020520128A (ja
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ジェイ． ドラブ，ジョン
ジェイ． ドラブ，ジョン
ジー． ミルン，ジェイソン
ジー． ミルン，ジェイソン
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Raytheon Co
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Raytheon Co
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H—ELECTRICITY
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    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/10155—Shape being other than a cuboid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/163—Connection portion, e.g. seal

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Micromachines (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
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Families Citing this family (53)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10497856B2 (en) 2016-06-20 2019-12-03 Butterfly Network, Inc. Electrical contact arrangement for microfabricated ultrasonic transducer
US9859245B1 (en) 2016-09-19 2018-01-02 Taiwan Semiconductor Manufacturing Co., Ltd. Chip package structure with bump and method for forming the same
US10489544B2 (en) 2016-12-14 2019-11-26 iCometrue Company Ltd. Logic drive based on standard commodity FPGA IC chips
US11625523B2 (en) 2016-12-14 2023-04-11 iCometrue Company Ltd. Logic drive based on standard commodity FPGA IC chips
US10447274B2 (en) 2017-07-11 2019-10-15 iCometrue Company Ltd. Logic drive based on standard commodity FPGA IC chips using non-volatile memory cells
CN112164688B (zh) * 2017-07-21 2023-06-13 联华电子股份有限公司 芯片堆叠结构及管芯堆叠结构的制造方法
US10957679B2 (en) 2017-08-08 2021-03-23 iCometrue Company Ltd. Logic drive based on standardized commodity programmable logic semiconductor IC chips
US10630296B2 (en) 2017-09-12 2020-04-21 iCometrue Company Ltd. Logic drive with brain-like elasticity and integrality based on standard commodity FPGA IC chips using non-volatile memory cells
US10608642B2 (en) 2018-02-01 2020-03-31 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips comprising non-volatile radom access memory cells
US10623000B2 (en) 2018-02-14 2020-04-14 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips
US10644826B2 (en) 2018-02-23 2020-05-05 Advanced Micro Devices, Inc. Flexibile interfaces using through-silicon via technology
US10509752B2 (en) * 2018-04-27 2019-12-17 Advanced Micro Devices, Inc. Configuration of multi-die modules with through-silicon vias
US12476637B2 (en) 2018-05-24 2025-11-18 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips
US10608638B2 (en) 2018-05-24 2020-03-31 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips
US11031345B2 (en) * 2018-08-14 2021-06-08 Medtronic, Inc. Integrated circuit package and method of forming same
US11309334B2 (en) 2018-09-11 2022-04-19 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
DE102018122515B4 (de) * 2018-09-14 2020-03-26 Infineon Technologies Ag Verfahren zum Herstellen eines Halbleiteroxid- oder Glas-basierten Verbindungskörpers mit Verdrahtungsstruktur
US10937762B2 (en) 2018-10-04 2021-03-02 iCometrue Company Ltd. Logic drive based on multichip package using interconnection bridge
KR102477355B1 (ko) * 2018-10-23 2022-12-15 삼성전자주식회사 캐리어 기판 및 이를 이용한 기판 처리 장치
US11616046B2 (en) 2018-11-02 2023-03-28 iCometrue Company Ltd. Logic drive based on chip scale package comprising standardized commodity programmable logic IC chip and memory IC chip
US11211334B2 (en) 2018-11-18 2021-12-28 iCometrue Company Ltd. Logic drive based on chip scale package comprising standardized commodity programmable logic IC chip and memory IC chip
CN109585434B (zh) * 2018-11-30 2020-05-15 华进半导体封装先导技术研发中心有限公司 一种晶圆级光感系统封装结构及其制造方法
JP7242342B2 (ja) * 2019-02-22 2023-03-20 三菱重工業株式会社 マルチチップモジュール、電子機器およびマルチチップモジュールの製造方法
US11798865B2 (en) 2019-03-04 2023-10-24 Intel Corporation Nested architectures for enhanced heterogeneous integration
EP3709346B1 (en) * 2019-03-15 2023-01-18 Infineon Technologies Austria AG An electronic module comprising a semiconductor package with integrated clip and fastening element
US10985154B2 (en) 2019-07-02 2021-04-20 iCometrue Company Ltd. Logic drive based on multichip package comprising standard commodity FPGA IC chip with cryptography circuits
US11227838B2 (en) 2019-07-02 2022-01-18 iCometrue Company Ltd. Logic drive based on multichip package comprising standard commodity FPGA IC chip with cooperating or supporting circuits
US11887930B2 (en) 2019-08-05 2024-01-30 iCometrue Company Ltd. Vertical interconnect elevator based on through silicon vias
EP3786108A1 (en) 2019-08-30 2021-03-03 Imec VZW Fabrication method for a mems device
CN110579516A (zh) * 2019-09-02 2019-12-17 青岛歌尔智能传感器有限公司 二氧化氮气体检测器件及其制作方法、以及电子产品
US11452199B2 (en) 2019-09-12 2022-09-20 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Electronic module with single or multiple components partially surrounded by a thermal decoupling gap
US11637056B2 (en) 2019-09-20 2023-04-25 iCometrue Company Ltd. 3D chip package based on through-silicon-via interconnection elevator
CN112670191A (zh) * 2019-10-16 2021-04-16 长鑫存储技术有限公司 半导体封装方法、半导体封装结构及封装体
US11387204B2 (en) * 2020-01-16 2022-07-12 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure and method of fabricating the same
US11600526B2 (en) 2020-01-22 2023-03-07 iCometrue Company Ltd. Chip package based on through-silicon-via connector and silicon interconnection bridge
US11784101B2 (en) * 2020-03-02 2023-10-10 Amkor Technology Singapore Holding Pte. Ltd. Semiconductor devices comprising a lid structure and methods of manufacturing semiconductor devices comprising a lid structure
US11309249B2 (en) 2020-05-04 2022-04-19 Nanya Technology Corporation Semiconductor package with air gap and manufacturing method thereof
CN112234053B (zh) * 2020-10-15 2022-10-04 联合微电子中心有限责任公司 晶圆堆叠方法、晶圆堆叠结构和半导体封装
CN112331617B (zh) * 2020-11-05 2023-06-09 联合微电子中心有限责任公司 一种埋入式键合工艺三维集成方法
JP2024504035A (ja) * 2020-12-30 2024-01-30 アデイア セミコンダクター ボンディング テクノロジーズ インコーポレイテッド 直接接合構造体
US12046477B2 (en) 2021-01-08 2024-07-23 Taiwan Semiconductor Manufacturing Company, Ltd. By-site-compensated etch back for local planarization/topography adjustment
US12261186B2 (en) * 2021-03-25 2025-03-25 Raytheon Company Mosaic focal plane array
US12199008B2 (en) * 2021-03-31 2025-01-14 Texas Instruments Incorporated Package heat dissipation including a die attach film
US12176278B2 (en) 2021-05-30 2024-12-24 iCometrue Company Ltd. 3D chip package based on vertical-through-via connector
US12278255B2 (en) 2021-06-11 2025-04-15 Raytheon Company Thin film obscurant for microelectronics
US11688700B2 (en) 2021-06-11 2023-06-27 Raytheon Company Die package having security features
CN113471083B (zh) * 2021-09-03 2021-11-02 南通汇丰电子科技有限公司 一种半导体堆叠封装结构及其制备方法
US12268012B2 (en) 2021-09-24 2025-04-01 iCometrue Company Ltd. Multi-output look-up table (LUT) for use in coarse-grained field-programmable-gate-array (FPGA) integrated-circuit (IC) chip
US20230139175A1 (en) * 2021-11-01 2023-05-04 Micron Technology, Inc. Semiconductor device assemblies including monolithic silicon structures for thermal dissipation and methods of making the same
CN114408857B (zh) * 2022-03-28 2022-09-06 南京声息芯影科技有限公司 有源晶圆键合架构的CMUT-on-CMOS的超声换能器及制造方法
CN120826780A (zh) * 2023-06-26 2025-10-21 株式会社村田制作所 复合部件
US20250167083A1 (en) * 2023-11-22 2025-05-22 Nxp Usa, Inc. Panel level fabrication of stacked electronic device packages with enclosed cavities
WO2025168207A1 (en) * 2024-02-07 2025-08-14 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Electronic device with electronic component connected to two organic-type component carriers being connected by a connection structure

Family Cites Families (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11145381A (ja) * 1997-11-12 1999-05-28 Denso Corp 半導体マルチチップモジュール
US6902987B1 (en) 2000-02-16 2005-06-07 Ziptronix, Inc. Method for low temperature bonding and bonded structure
US6818464B2 (en) 2001-10-17 2004-11-16 Hymite A/S Double-sided etching technique for providing a semiconductor structure with through-holes, and a feed-through metalization process for sealing the through-holes
JP2004071597A (ja) * 2002-08-01 2004-03-04 Renesas Technology Corp 半導体モジュール
US7138293B2 (en) * 2002-10-04 2006-11-21 Dalsa Semiconductor Inc. Wafer level packaging technique for microdevices
JP4342174B2 (ja) 2002-12-27 2009-10-14 新光電気工業株式会社 電子デバイス及びその製造方法
US7118991B2 (en) 2004-04-01 2006-10-10 Delphi Technologies, Inc. Encapsulation wafer process
US7045827B2 (en) 2004-06-24 2006-05-16 Gallup Kendra J Lids for wafer-scale optoelectronic packages
US7326629B2 (en) 2004-09-10 2008-02-05 Agency For Science, Technology And Research Method of stacking thin substrates by transfer bonding
US7295029B2 (en) 2005-03-24 2007-11-13 Memsic, Inc. Chip-scale package for integrated circuits
US7262622B2 (en) * 2005-03-24 2007-08-28 Memsic, Inc. Wafer-level package for integrated circuits
JP2007123705A (ja) * 2005-10-31 2007-05-17 Elpida Memory Inc 積層型半導体装置及びその製造方法
DE102006062473A1 (de) 2006-12-28 2008-07-03 Qimonda Ag Halbleiterbauelement mit auf einem Substrat montiertem Chip
US8164153B2 (en) 2009-05-27 2012-04-24 Continental Automotive Systems, Inc. Thin semiconductor device having embedded die support and methods of making the same
US8263434B2 (en) * 2009-07-31 2012-09-11 Stats Chippac, Ltd. Semiconductor device and method of mounting die with TSV in cavity of substrate for electrical interconnect of Fi-PoP
US8241964B2 (en) * 2010-05-13 2012-08-14 Stats Chippac, Ltd. Semiconductor device and method of embedding bumps formed on semiconductor die into penetrable adhesive layer to reduce die shifting during encapsulation
KR101943460B1 (ko) * 2011-02-15 2019-01-29 에스케이하이닉스 주식회사 반도체 패키지
US8653673B2 (en) 2011-12-20 2014-02-18 Raytheon Company Method for packaging semiconductors at a wafer level
US8697542B2 (en) 2012-04-12 2014-04-15 The Research Foundation Of State University Of New York Method for thin die-to-wafer bonding
KR101932495B1 (ko) * 2012-05-11 2018-12-27 삼성전자주식회사 반도체 패키지 및 반도체 패키지의 제조 방법
JP6058962B2 (ja) * 2012-09-29 2017-01-11 京セラ株式会社 半導体素子収納用配線基板およびその製造方法
US8921992B2 (en) 2013-03-14 2014-12-30 Raytheon Company Stacked wafer with coolant channels
US9595526B2 (en) * 2013-08-09 2017-03-14 Apple Inc. Multi-die fine grain integrated voltage regulation
EP3104410B1 (en) * 2014-03-10 2022-12-07 Mitsubishi Heavy Industries, Ltd. Multi-chip module, on-board computer, sensor interface substrate, and multi-chip module manufacturing method
US9355997B2 (en) * 2014-03-12 2016-05-31 Invensas Corporation Integrated circuit assemblies with reinforcement frames, and methods of manufacture
US20150262902A1 (en) * 2014-03-12 2015-09-17 Invensas Corporation Integrated circuits protected by substrates with cavities, and methods of manufacture
CN104051337B (zh) 2014-04-24 2017-02-15 上海珏芯光电科技有限公司 立体堆叠集成电路系统芯片封装的制造方法与测试方法
US9741649B2 (en) * 2014-06-04 2017-08-22 Invensas Corporation Integrated interposer solutions for 2D and 3D IC packaging
US20150380343A1 (en) 2014-06-27 2015-12-31 Raytheon Company Flip chip mmic having mounting stiffener
US9067779B1 (en) * 2014-07-14 2015-06-30 Butterfly Network, Inc. Microfabricated ultrasonic transducers and related apparatus and methods
US9576942B1 (en) * 2015-12-18 2017-02-21 Intel Corporation Integrated circuit assembly that includes stacked dice

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