JP6806436B2 - 半導体装置用基板とその製造方法、および半導体装置 - Google Patents

半導体装置用基板とその製造方法、および半導体装置 Download PDF

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Publication number
JP6806436B2
JP6806436B2 JP2015226212A JP2015226212A JP6806436B2 JP 6806436 B2 JP6806436 B2 JP 6806436B2 JP 2015226212 A JP2015226212 A JP 2015226212A JP 2015226212 A JP2015226212 A JP 2015226212A JP 6806436 B2 JP6806436 B2 JP 6806436B2
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Japan
Prior art keywords
metal
semiconductor device
substrate
metal portion
master substrate
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JP2015226212A
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English (en)
Japanese (ja)
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JP2017098315A5 (enExample
JP2017098315A (ja
Inventor
中川　宏史
宏史 中川
佑也 五郎丸
佑也 五郎丸
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Maxell Ltd
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Maxell Holdings Ltd
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Application filed by Maxell Holdings Ltd filed Critical Maxell Holdings Ltd
Priority to JP2015226212A priority Critical patent/JP6806436B2/ja
Publication of JP2017098315A publication Critical patent/JP2017098315A/ja
Publication of JP2017098315A5 publication Critical patent/JP2017098315A5/ja
Priority to JP2020198627A priority patent/JP7339231B2/ja
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Publication of JP6806436B2 publication Critical patent/JP6806436B2/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Lead Frames For Integrated Circuits (AREA)
JP2015226212A 2015-11-19 2015-11-19 半導体装置用基板とその製造方法、および半導体装置 Active JP6806436B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2015226212A JP6806436B2 (ja) 2015-11-19 2015-11-19 半導体装置用基板とその製造方法、および半導体装置
JP2020198627A JP7339231B2 (ja) 2015-11-19 2020-11-30 半導体装置用基板、半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2015226212A JP6806436B2 (ja) 2015-11-19 2015-11-19 半導体装置用基板とその製造方法、および半導体装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2020198627A Division JP7339231B2 (ja) 2015-11-19 2020-11-30 半導体装置用基板、半導体装置

Publications (3)

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JP2017098315A JP2017098315A (ja) 2017-06-01
JP2017098315A5 JP2017098315A5 (enExample) 2018-10-11
JP6806436B2 true JP6806436B2 (ja) 2021-01-06

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JP2015226212A Active JP6806436B2 (ja) 2015-11-19 2015-11-19 半導体装置用基板とその製造方法、および半導体装置

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JP (1) JP6806436B2 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019212649A (ja) * 2018-05-31 2019-12-12 マクセルホールディングス株式会社 半導体装置用基板とその製造方法、および半導体装置
JP2022189979A (ja) * 2020-11-30 2022-12-22 マクセル株式会社 半導体装置用基板、半導体装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4942827B2 (enExample) * 1971-11-15 1974-11-16
JP3764587B2 (ja) * 1998-06-30 2006-04-12 富士通株式会社 半導体装置の製造方法
JP3455685B2 (ja) * 1998-11-05 2003-10-14 新光電気工業株式会社 半導体装置の製造方法
JP4362163B2 (ja) * 1999-04-06 2009-11-11 富士通マイクロエレクトロニクス株式会社 半導体装置の製造方法
JP2001230345A (ja) * 2000-02-17 2001-08-24 Sumitomo Metal Mining Co Ltd 半導体装置及びその製造方法並びにその製造に用いられるリードフレーム
US7538415B1 (en) * 2003-11-20 2009-05-26 Bridge Semiconductor Corporation Semiconductor chip assembly with bumped terminal, filler and insulative base
JP2006093575A (ja) * 2004-09-27 2006-04-06 Hitachi Cable Ltd 半導体装置およびその製造方法
US20100123230A1 (en) * 2008-11-20 2010-05-20 Frederick Rodriguez Dahilig Integrated circuit packaging system having bumped lead and method of manufacture thereof
JP5851888B2 (ja) * 2012-03-02 2016-02-03 ルネサスエレクトロニクス株式会社 半導体装置の製造方法および半導体装置
JP2013042187A (ja) * 2012-11-29 2013-02-28 Hitachi Maxell Ltd 半導体装置

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JP2017098315A (ja) 2017-06-01

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