JP6760518B2 - 半導体モジュール - Google Patents

半導体モジュール Download PDF

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JP6760518B2
JP6760518B2 JP2019554150A JP2019554150A JP6760518B2 JP 6760518 B2 JP6760518 B2 JP 6760518B2 JP 2019554150 A JP2019554150 A JP 2019554150A JP 2019554150 A JP2019554150 A JP 2019554150A JP 6760518 B2 JP6760518 B2 JP 6760518B2
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metal pattern
semiconductor module
solder resist
semiconductor
adsorption
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JPWO2019097685A1 (ja
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貴之 松本
貴之 松本
林田　幸昌
幸昌 林田
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Description

本発明は、半導体モジュールに関する。
電鉄等に使用される半導体モジュールでは、絶縁基板の金属パターンに半導体チップ及び端子がはんだ付けされる。従来は絶縁基板を搬送する際に金属パターンをマウンタの吸着パッドで吸着していた（例えば、特許文献１参照）。
日本特開２００４−２４１６８９号公報
吸着パッドは主にシリコーンで構成されるため、吸着パッドのシリコーンが揮発してシロキサンガスが発生する。このシロキサンガスが酸化して、吸着した金属パターンの表面がＳｉＯ２膜で汚染される。これにより、金属パターンに接合するワイヤーボンド又ははんだ付け等の強度が低下する。また、ＳｉＯ２膜で汚染された金属パターンと封止材の密着性が低下して封止材が剥がれ、その剥がれが伸展して半導体チップと封止材の密着性が低下する場合もある。この結果、デバイス不良が発生するという問題があった。
本発明は、上述のような課題を解決するためになされたもので、その目的はデバイス不良の発生を低減させることができる半導体モジュールを得るものである。
本発明に係る半導体モジュールは、絶縁基板と、前記絶縁基板の上に設けられた金属パターンと、前記金属パターンの上に設けられたソルダーレジストと、前記ソルダーレジストの開口部において前記金属パターンの上に実装された半導体チップとを備え、前記ソルダーレジストの一部に溝で囲まれた吸着領域が設けられていることを特徴とする。
本発明では、ソルダーレジストの一部に溝で囲まれた吸着領域が設けられている。吸着領域を吸着パッドで吸着すると吸着領域の表面がＳｉＯ２膜で汚染されるが、ソルダーレジストの一部である吸着領域には半導体チップ等を直接接合する用途はないため、汚染の影響は少ない。また、吸着領域と封止材の密着性が低下して封止材が剥がれても、吸着領域を囲む溝により剥がれの伸展が抑制されるため、剥がれが半導体チップまで伸展しにくい。この結果、デバイス不良の発生を低減させることができる。
実施の形態１に係る半導体モジュールを示す平面図である。 図１のＩ−ＩＩに沿った断面図である。 実施の形態２に係る半導体モジュールを示す平面図である。 実施の形態３に係る半導体モジュールを示す平面図である。
実施の形態に係る半導体モジュールについて図面を参照して説明する。同じ又は対応する構成要素には同じ符号を付し、説明の繰り返しを省略する場合がある。
実施の形態１．
図１は、実施の形態１に係る半導体モジュールを示す平面図である。図２は、図１のＩ−ＩＩに沿った断面図である。絶縁基板１は例えばセラミック基板であり、上面に金属パターン２が設けられ、下面に金属パターン３が設けられている。
金属パターン２の上に、はんだ付けの際にはんだ漏れを防ぐためのソルダーレジスト４が設けられている。ソルダーレジスト４の開口部において金属パターン２の上に半導体チップ５が実装されている。
金属パターン２の半導体チップ５の実装部分以外に端子接合用めっき６が設けられている。位置認識マーク７が端子接合用めっき６に隣接して設けられている。位置認識マーク７は、めっき又は穴であり、ワイヤーボンドの際又は端子接合用めっき６に端子を接合する際の位置合わせに用いられる。
ソルダーレジスト４の一部に溝８で囲まれた円形の吸着領域９が設けられている。吸着領域９は絶縁基板１の中央に設けられている。吸着パッドで吸着するため、吸着領域９の大きさをφ３ｍｍ以上にする。一方、省スペース化のため、吸着領域９の大きさはφ１０ｍｍ以下にすることが好ましい。また、ソルダーレジスト４に溝８を掘ることで吸着領域９が形成されるため、ソルダーレジスト４の吸着領域９とその他の部分は同じ材料からなり膜厚も同じである。
絶縁基板１を搬送する際に吸着領域９を吸着パッドで吸着する。吸着領域９を溝８で囲むことにより、吸着領域９が視覚的に分かり易くなる。従って、絶縁基板１をマウンタにより自動搬送できるため、作業性が向上し、人的要因による不良の発生を低減させることができる。なお、ソルダーレジスト４と金属パターン２の密着性は高いため、吸着領域９を吸着して絶縁基板１を持ち上げる程度では吸着領域９は剥がれない。絶縁基板１を搬送した後、金属パターン２、ソルダーレジスト４及び半導体チップ５は封止材１０により封止される。
以上説明したように、本実施の形態では、ソルダーレジスト４の一部に溝８で囲まれた吸着領域９が設けられている。吸着領域９を吸着パッドで吸着すると吸着領域９の表面がＳｉＯ２膜で汚染されるが、ソルダーレジスト４の一部である吸着領域９には半導体チップ等を直接接合する用途はないため、汚染の影響は少ない。また、吸着領域９と封止材１０の密着性が低下して封止材１０が剥がれても、吸着領域９を囲む溝８により剥がれの伸展が抑制されるため、剥がれが半導体チップ５まで伸展しにくい。この結果、デバイス不良の発生を低減させることができる。
実施の形態２．
図３は、実施の形態２に係る半導体モジュールを示す平面図である。本実施の形態では吸着領域９が絶縁基板１の四隅にそれぞれ設けられている。このように絶縁基板１の上において吸着領域９を複数設けることにより、絶縁基板１の搬送時の安定性を向上させることができる。
実施の形態３．
図４は、実施の形態３に係る半導体モジュールを示す平面図である。本実施の形態では吸着領域９が端子接合用めっき６に隣接して設けられている。これにより、吸着領域９を位置認識マークとして用いることができる。このため、省スペース化を図りつつ、設計の自由度を上げることができる。
なお、半導体チップ５はＩＧＢＴ又はダイオードであるが、ＭＯＳＦＥＴ又はＳＢＤ等でもよい。また、半導体チップ５は、珪素によって形成されたものに限らず、珪素に比べてバンドギャップが大きいワイドバンドギャップ半導体によって形成されたものでもよい。ワイドバンドギャップ半導体は、例えば、炭化珪素、窒化ガリウム系材料、又はダイヤモンドである。このようなワイドバンドギャップ半導体によって形成された半導体チップは、耐電圧性や許容電流密度が高いため、小型化できる。この小型化された半導体チップを用いることで、この半導体チップを組み込んだ半導体モジュールも小型化・高集積化できる。また、半導体チップの耐熱性が高いため、ヒートシンクの放熱フィンを小型化でき、水冷部を空冷化できるので、半導体モジュールを更に小型化できる。
１ 絶縁基板、２ 金属パターン、４ ソルダーレジスト、５ 半導体チップ、７ 位置認識マーク、８ 溝、９ 吸着領域、１０ 封止材

Claims (5)

  1. 絶縁基板と、
    前記絶縁基板の上に設けられた金属パターンと、
    前記金属パターンの上に設けられたソルダーレジストと、
    前記ソルダーレジストの開口部において前記金属パターンの上に実装された半導体チップと、
    前記金属パターン、前記ソルダーレジスト及び前記半導体チップを封止する封止材とを備え、
    前記ソルダーレジストの一部に溝で囲まれた吸着領域が設けられていることを特徴とする半導体モジュール。
  2. 前記吸着領域の大きさはφ３ｍｍ以上１０ｍｍ以下であることを特徴とする請求項１に記載の半導体モジュール。
  3. 前記絶縁基板の上において前記吸着領域が複数設けられていることを特徴とする請求項１又は２に記載の半導体モジュール。
  4. 前記金属パターンの上に設けられた端子接合用めっきを更に備え、
    前記吸着領域は前記端子接合用めっきに隣接して設けられていることを特徴とする請求項１〜３の何れか１項に記載の半導体モジュール。
  5. 前記半導体チップはワイドバンドギャップ半導体によって形成されていることを特徴とする請求項１〜４の何れか１項に記載の半導体モジュール。
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