JP6705509B2 - 回路モジュール - Google Patents
回路モジュール Download PDFInfo
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- JP6705509B2 JP6705509B2 JP2018547542A JP2018547542A JP6705509B2 JP 6705509 B2 JP6705509 B2 JP 6705509B2 JP 2018547542 A JP2018547542 A JP 2018547542A JP 2018547542 A JP2018547542 A JP 2018547542A JP 6705509 B2 JP6705509 B2 JP 6705509B2
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- 238000007789 sealing Methods 0.000 claims description 126
- 239000011347 resin Substances 0.000 claims description 111
- 229920005989 resin Polymers 0.000 claims description 111
- 239000000758 substrate Substances 0.000 claims description 43
- 239000004020 conductor Substances 0.000 claims description 28
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- 230000005855 radiation Effects 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 4
- 238000005245 sintering Methods 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/02—Casings
- H01F27/022—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/28—Coils; Windings; Conductive connections
- H01F27/2804—Printed windings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G2/00—Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
- H01G2/10—Housing; Encapsulation
- H01G2/103—Sealings, e.g. for lead-in wires; Covers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/30—Stacked capacitors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15172—Fan-out arrangement of the internal vias
- H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
Description
第1の導電体又は第2の導電体が柱状の焼結金属であってもよい。
図1及び図2に基づいて、本発明にかかる回路モジュールの第1実施形態である回路モジュール100の構成を説明する。図1(A)は、本発明にかかる回路モジュールの第1実施形態である回路モジュール100を示す上面図、図1(B)は、図1(A)のA1−A1間の端面図である。図2は、本発明にかかる回路モジュールの第1実施形態である回路モジュール100の製造工程を示す図である。
図3及び図4に基づいて、本発明にかかる回路モジュールの第2実施形態である回路モジュール200の構成を説明する。図3(A)は、本発明にかかる回路モジュールの第2実施形態である回路モジュール200を示す上面図、図3(B)は、図3(A)のA2−A2間の端面図である。図4は、本発明にかかる回路モジュールの第2実施形態である回路モジュール200の製造工程を示す図である。
図5、図6及び図7に基づいて、本発明にかかる回路モジュールの第3実施形態である回路モジュール300の構成を説明する。図5(A)は、本発明にかかる回路モジュールの第3実施形態である回路モジュール300を示す上面図、図5(B)は、図5(A)のA3−A3間の端面図である。図6は、本発明にかかる回路モジュールの第3実施形態である回路モジュール300の製造工程の前半を示す図である。図7は、本発明にかかる回路モジュールの第3実施形態である回路モジュール300の製造工程の後半を示す図である。
Claims (10)
- 配線パターンを有する基板と、
前記基板の一主面に、第1の電子部品が実装される第1の領域と、
前記基板の前記一主面に、前記第1の電子部品よりも背の高い、第2の電子部品が実装される第2の領域と、
前記第1の領域に設けられ、前記配線パターンと電気的に接続された第1の導電体と、
前記第1の電子部品と前記第2の電子部品と前記第1の導電体とを封止する封止樹脂と、
前記第1の領域を封止している封止樹脂の表面に実装される第3の電子部品と、
を備え、
前記第1の領域を封止している封止樹脂は、前記第2の領域を封止している封止樹脂よりも背が低く形成され、
前記第1の領域を封止している前記封止樹脂の表面に前記第1の導電体の一部が露出するとともに、
前記第1の領域を封止している前記封止樹脂の表面に配線が形成され、
露出した前記第1の導電体と前記封止樹脂の表面の配線とが電気的に接続され、
前記配線には、前記第3の電子部品が実装されている、回路モジュール。 - 前記第1の導電体に接続される封止樹脂の表面の配線は、給電電極を含む請求項1に記載の回路モジュール。
- 前記第1の導電体に接続される封止樹脂の表面の配線は、アンテナの放射電極を含む請求項1または2に記載の回路モジュール。
- 前記第1の導電体のうち少なくともひとつの導電体が、前記第1の電子部品の電極上に形成されている、請求項1から3のいずれか1項に記載の回路モジュール。
- 前記封止樹脂の表面の配線と、前記第3の電子部品とを封止する追加の封止樹脂を備える、請求項4に記載の回路モジュール。
- 前記追加の封止樹脂が、前記第2の領域を封止している封止樹脂の表面も封止している、請求項5記載の回路モジュール。
- 前記基板、前記封止樹脂及び前記追加の封止樹脂の側面、並びに前記追加の封止樹脂の表面又は前記封止樹脂及び前記追加の封止樹脂の表面に、前記基板の接地電位と電気的に接続された導電性膜が形成されている、請求項5又は6記載の回路モジュール。
- 前記第3の電子部品の電極上又は前記封止樹脂の表面の配線上に第2の導電体がさらに形成され、
前記追加の封止樹脂に封止されるとともに、
前記追加の封止樹脂の表面に前記第2の導電体の一部が露出しており、
露出した前記第2の導電体と前記導電性膜とが電気的に接続されている、請求項7記載の回路モジュール。 - 前記第1の導電体が柱状の焼結金属である、請求項1から7のいずれか一項記載の回路モジュール。
- 前記第1の導電体又は前記第2の導電体が柱状の焼結金属である、請求項8記載の回路モジュール。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016208266 | 2016-10-25 | ||
JP2016208266 | 2016-10-25 | ||
PCT/JP2017/036964 WO2018079278A1 (ja) | 2016-10-25 | 2017-10-12 | 回路モジュール |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2018079278A1 JPWO2018079278A1 (ja) | 2019-09-12 |
JP6705509B2 true JP6705509B2 (ja) | 2020-06-03 |
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JP2018547542A Active JP6705509B2 (ja) | 2016-10-25 | 2017-10-12 | 回路モジュール |
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US (1) | US10861759B2 (ja) |
JP (1) | JP6705509B2 (ja) |
CN (1) | CN109892023B (ja) |
WO (1) | WO2018079278A1 (ja) |
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WO2020196131A1 (ja) * | 2019-03-22 | 2020-10-01 | 株式会社村田製作所 | 電子部品モジュール |
CN113544843A (zh) * | 2019-04-03 | 2021-10-22 | 株式会社村田制作所 | 模块、端子集合体以及模块的制造方法 |
US11139268B2 (en) * | 2019-08-06 | 2021-10-05 | Advanced Semiconductor Engineering, Inc. | Semiconductor package structure and method of manufacturing the same |
KR20220000087A (ko) * | 2020-06-25 | 2022-01-03 | 삼성전기주식회사 | 전자 소자 모듈 |
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JP2002151801A (ja) | 2000-11-10 | 2002-05-24 | Citizen Watch Co Ltd | 回路基板構造およびその製造方法 |
US6919508B2 (en) * | 2002-11-08 | 2005-07-19 | Flipchip International, Llc | Build-up structures with multi-angle vias for chip to chip interconnects and optical bussing |
CN102970829B (zh) | 2003-09-12 | 2016-01-20 | 独立行政法人产业技术综合研究所 | 衬底的制备方法 |
WO2006011320A1 (ja) * | 2004-07-30 | 2006-02-02 | Murata Manufacturing Co., Ltd. | 複合型電子部品及びその製造方法 |
JP4252019B2 (ja) * | 2004-09-01 | 2009-04-08 | 三洋電機株式会社 | 回路装置およびその製造方法 |
JP4556568B2 (ja) | 2004-09-03 | 2010-10-06 | パナソニック株式会社 | 弾性表面波装置の製造方法 |
JP2006222126A (ja) * | 2005-02-08 | 2006-08-24 | Murata Mfg Co Ltd | 回路基板 |
JP2007329162A (ja) * | 2006-06-06 | 2007-12-20 | Kyocera Chemical Corp | 電子部品装置の製造方法、封止用熱硬化型樹脂シート及び電子部品装置 |
JP2009188144A (ja) | 2008-02-06 | 2009-08-20 | Murata Mfg Co Ltd | 部品内蔵モジュールの製造方法 |
CN101978490B (zh) | 2008-03-31 | 2012-10-17 | 株式会社村田制作所 | 电子元器件组件及该电子元器件组件的制造方法 |
JP2010177520A (ja) * | 2009-01-30 | 2010-08-12 | Toshiba Corp | 電子回路モジュールおよびその製造方法 |
TWI473244B (zh) * | 2011-10-05 | 2015-02-11 | Chipsip Technology Co Ltd | 堆疊式半導體封裝結構 |
JP5889615B2 (ja) | 2011-11-29 | 2016-03-22 | 新電元工業株式会社 | 樹脂封止モジュールの製造方法および樹脂封止モジュール |
WO2014178153A1 (ja) * | 2013-04-30 | 2014-11-06 | 株式会社村田製作所 | 複合基板 |
JP5527785B1 (ja) * | 2013-08-08 | 2014-06-25 | 太陽誘電株式会社 | 回路モジュール及び回路モジュールの製造方法 |
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2017
- 2017-10-12 WO PCT/JP2017/036964 patent/WO2018079278A1/ja active Application Filing
- 2017-10-12 JP JP2018547542A patent/JP6705509B2/ja active Active
- 2017-10-12 CN CN201780065524.0A patent/CN109892023B/zh active Active
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2019
- 2019-04-03 US US16/374,022 patent/US10861759B2/en active Active
Also Published As
Publication number | Publication date |
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CN109892023B (zh) | 2022-03-22 |
CN109892023A (zh) | 2019-06-14 |
WO2018079278A1 (ja) | 2018-05-03 |
US20190229027A1 (en) | 2019-07-25 |
US10861759B2 (en) | 2020-12-08 |
JPWO2018079278A1 (ja) | 2019-09-12 |
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