JP6702019B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP6702019B2
JP6702019B2 JP2016123869A JP2016123869A JP6702019B2 JP 6702019 B2 JP6702019 B2 JP 6702019B2 JP 2016123869 A JP2016123869 A JP 2016123869A JP 2016123869 A JP2016123869 A JP 2016123869A JP 6702019 B2 JP6702019 B2 JP 6702019B2
Authority
JP
Japan
Prior art keywords
semiconductor element
stress
circuit board
expansion member
expansion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2016123869A
Other languages
English (en)
Japanese (ja)
Other versions
JP2017228659A (ja
JP2017228659A5 (https=
Inventor
谷　直樹
直樹 谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JTEKT Corp
Original Assignee
JTEKT Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JTEKT Corp filed Critical JTEKT Corp
Priority to JP2016123869A priority Critical patent/JP6702019B2/ja
Priority to US15/623,943 priority patent/US10211135B2/en
Priority to CN201710474001.3A priority patent/CN107527872A/zh
Priority to EP17177033.2A priority patent/EP3261416A1/en
Publication of JP2017228659A publication Critical patent/JP2017228659A/ja
Publication of JP2017228659A5 publication Critical patent/JP2017228659A5/ja
Application granted granted Critical
Publication of JP6702019B2 publication Critical patent/JP6702019B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/40—Fillings or auxiliary members in containers, e.g. centering rings
    • H10W76/42—Fillings
    • H10W76/47—Solid or gel fillings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/06—Thermal details
    • H05K2201/068—Thermal details wherein the coefficient of thermal expansion is important
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09136—Means for correcting warpage
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10568—Integral adaptations of a component or an auxiliary PCB for mounting, e.g. integral spacer element
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2018—Presence of a frame in a printed circuit or printed circuit assembly
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/121—Arrangements for protection of devices protecting against mechanical damage
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Wire Bonding (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
JP2016123869A 2016-06-22 2016-06-22 半導体装置 Expired - Fee Related JP6702019B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2016123869A JP6702019B2 (ja) 2016-06-22 2016-06-22 半導体装置
US15/623,943 US10211135B2 (en) 2016-06-22 2017-06-15 Semiconductor device
CN201710474001.3A CN107527872A (zh) 2016-06-22 2017-06-21 半导体装置
EP17177033.2A EP3261416A1 (en) 2016-06-22 2017-06-21 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2016123869A JP6702019B2 (ja) 2016-06-22 2016-06-22 半導体装置

Publications (3)

Publication Number Publication Date
JP2017228659A JP2017228659A (ja) 2017-12-28
JP2017228659A5 JP2017228659A5 (https=) 2019-02-28
JP6702019B2 true JP6702019B2 (ja) 2020-05-27

Family

ID=59101324

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016123869A Expired - Fee Related JP6702019B2 (ja) 2016-06-22 2016-06-22 半導体装置

Country Status (4)

Country Link
US (1) US10211135B2 (https=)
EP (1) EP3261416A1 (https=)
JP (1) JP6702019B2 (https=)
CN (1) CN107527872A (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108925039B (zh) * 2018-06-25 2020-05-12 维沃移动通信有限公司 移动终端、电路板组件及电路板组件的制备方法
US11631635B2 (en) * 2020-01-09 2023-04-18 International Business Machines Corporation Flex prevention mechanical structure such as a ring for large integrated circuit modules and packages and methods of manufacture using same

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5678356U (https=) * 1979-11-12 1981-06-25
US5852326A (en) * 1990-09-24 1998-12-22 Tessera, Inc. Face-up semiconductor chip assembly
JPH0897319A (ja) 1994-09-29 1996-04-12 Toshiba Corp 電子部品用パッケージ
JP2000022034A (ja) 1998-07-01 2000-01-21 Hitachi Ltd 電子回路装置の接続構造
US6734540B2 (en) 2000-10-11 2004-05-11 Altera Corporation Semiconductor package with stress inhibiting intermediate mounting substrate
JP3860000B2 (ja) * 2001-09-07 2006-12-20 Ｎｅｃエレクトロニクス株式会社 半導体装置およびその製造方法
US6852926B2 (en) * 2002-03-26 2005-02-08 Intel Corporation Packaging microelectromechanical structures
JP4058642B2 (ja) 2004-08-23 2008-03-12 セイコーエプソン株式会社 半導体装置
JP2008210827A (ja) * 2007-02-23 2008-09-11 Nec Electronics Corp 半導体装置および配線基板、ならびにそれらの製造方法
JP2008311584A (ja) * 2007-06-18 2008-12-25 Elpida Memory Inc 半導体パッケージの実装構造
DE102009009586A1 (de) * 2009-02-19 2010-08-26 Emitec Gesellschaft Für Emissionstechnologie Mbh Thermoelektrische Vorrichtung
JP2012199314A (ja) * 2011-03-18 2012-10-18 Seiko Epson Corp 半導体装置、印刷装置、及び製造方法
JP6122284B2 (ja) * 2012-11-29 2017-04-26 京セラ株式会社 電子素子収納用パッケージおよび電子装置
JP6169713B2 (ja) * 2013-09-27 2017-07-26 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法

Also Published As

Publication number Publication date
JP2017228659A (ja) 2017-12-28
CN107527872A (zh) 2017-12-29
EP3261416A1 (en) 2017-12-27
US10211135B2 (en) 2019-02-19
US20170372990A1 (en) 2017-12-28

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