JP6627522B2 - 半導体装置用部材及び半導体装置の製造方法、及び半導体装置用部材 - Google Patents
半導体装置用部材及び半導体装置の製造方法、及び半導体装置用部材 Download PDFInfo
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- JP6627522B2 JP6627522B2 JP2016006148A JP2016006148A JP6627522B2 JP 6627522 B2 JP6627522 B2 JP 6627522B2 JP 2016006148 A JP2016006148 A JP 2016006148A JP 2016006148 A JP2016006148 A JP 2016006148A JP 6627522 B2 JP6627522 B2 JP 6627522B2
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
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Description
また、本発明の第2の態様は半導体装置の製造方法である。上記半導体装置の製造方法は、金属部を備える第1の部材を有し、上記金属部の表面に、保管時又は輸送時の表面の化学変化を抑制し、はんだ接合時にはんだの固相線温度以下の温度で気化する処理被膜が形成された半導体装置用部材を用意する工程と、上記処理被膜を間に挟んで上記金属部と前記第2の部材が対向するように、上記第1の部材及び第2の部材を配置する工程と、上記はんだが溶融する前に上記処理被膜を加熱、気化させた後、上記はんだを溶融させて、上記第1の部材と前記第2の部材とを接合する工程と、を備える。
以下、本発明の半導体装置用部材の製造方法及び半導体装置用部材の実施形態1について、図面を参照しつつ具体的に説明する。
図1に、本発明の実施形態1の製造方法を説明するフロー図を示す。まず、はんだで接合され得る金属部を備える第1の部材を用意する(S1)。次に、第1の部材の金属部の表面を処理剤で表面処理する(S2)。
本発明において、半導体装置用部材は、金属部を備える第1の部材を有し、当該金属部の表面が処理被膜で覆われているものである。金属部は第2の部材とはんだで接合され得る。換言すれば、半導体装置用部材は、上記第1の部材を含み、当該第1の部材の表面に処理被膜を備えている。処理被膜は、第1の部材の金属部以外の表面を覆っていてもよい。
回路板1bは、絶縁板1aのおもて面上に選択的に形成されていて、これにより所定の電気回路を構成している。回路板1bは、銅、銅合金、アルミニウム、アルミニウム合金などからなる。金属板1cは、絶縁板1aの裏面に形成されている。金属板1cは、銅、銅合金、アルミニウム、アルミニウム合金などからなる。
Ni、Ge、P、In、Bi及びPbから選ばれる少なくとも一種の金属と、Snとからなる合金である。はんだは不可避の不純物を含んでもよい。鉛含有はんだでもよいし、鉛フリーはんだでもよい。鉛フリーはんだは、人体に有害な鉛を含まず、廃棄物として自然環境に対する影響が小さいので好ましい。はんだの好適な成分系は、例えばPb−Sn系、Pb−Ag−Sn系、Sn−Sb系、Sn−Cu系、Sn−Cu−Ag系、Sn−Ag系、Sn−Ag−Cu系、Sn−Ag−Cu−Ni−Ge系、Sn−Ag−Cu−Ni−P系、Sn−Cu−Ni系、Sn−In−Ag−Bi系等が挙げられる。これらの成分系の代表的な組成と固相線温度、液相線温度を表1に示す。なお、図中の%は質量%のことである。
パワー半導体モジュールの組み立て時に用いられるはんだは、表1から理解されるように、およそ200〜300℃の固相線温度である。したがって、本発明で用いる処理被膜2は、気化温度が80〜250℃であるものが、はんだが溶融する前に処理被膜2を十分に気化することができるので、好ましく、最適は100〜200℃である。80℃未満であると保管途中や輸送途中に気化し、部材使用直前までの化学変化を抑制できない。なお、従来から防錆剤として用いられているベンゾトリアゾール系処理被膜の気化温度は250℃〜300℃程度である。
有機物は、具体的には、ギ酸、酢酸、プロパン酸、ブタン酸、ペンタン酸、ヘキサン酸、ヘプタン酸、オクタン酸、ノナン酸、デカン酸、ウンデカン酸、ドデカン酸、トリデカン酸、テトラデカン酸、ペンタデカン酸、ヘキサデカン酸、ヘプタデカン酸、オクタデカン酸、ノナデカン酸、イコサン酸、プロペン酸、ブテン酸、ペンテン酸、ヘキセン酸、ヘプテン酸、オクテン酸、ノネン酸、デセン酸、ウンデセン酸、ドデセン酸、トリデセン酸、テトラデセン酸、ペンタデセン酸、ヘキサデセン酸、ヘプタデセン酸、オクタデセン酸、ノナデセン酸、イコセン酸、2−エチルサキサン酸、シュウ酸、マロン酸、コハク酸、グルタル酸、アジピン酸、ピメリン酸、スベリン酸、アゼライン酸、セバシン酸、ウンデカン二酸、ドデカン二酸、トリデカン二酸、テトラデカン二酸、ペンタデカン二酸、ヘキサデカン二酸、ヘプタデカン二酸、フタル酸、イソフタル酸、テレフタル酸、リンゴ酸、クエン酸等のカルボン酸、
これらのカルボン酸のアルカリ金属塩、例えばカリウム塩、ナトリウム塩、
これらのカルボン酸のアンモニウム塩
これらのカルボン酸のエステル化合物
を例示することができる。
調製された処理剤は、積層基板1の表面に、ディップコーティングやスピンコーティンクやスプレーコーティングやはけを用いた塗布法により回路板1bや金属板1cの表面に被覆され、上記処理剤の被膜が形成される。
処理被膜2は、通常はフラックス成分を含まないので、代わりに、はんだ接合時の雰囲気を、還元性雰囲気にすることが、良好なはんだ接合を行う上で好ましい。還元性雰囲気は、具体的にはH2ガス雰囲気、H2とN2の混合ガス雰囲気等が挙げられる。
上述した実施形態1は、第1の部材が積層基板1である例であったが、本発明の半導体装置用部材の製造方法は、第1の部材が積層基板1に限定されない。
図5に、パワー半導体モジュール21の組み立て時における主要部の模式的な断面図を示す。なお、図中の積層基板1は、図3に示した積層基板1と同様の構成を有しているため同一符号を付している。したがって、以下の説明では積層基板1についての重複する説明は省略する。積層基板1の回路板1b、金属板1c及び絶縁板1aの表面に、処理被膜2が被覆されている。
これらの部材に被覆された処理被膜2は、各部材の保管時又は輸送時の表面の化学変化抑制の機能を有する。また、はんだ接合時は、常温からの昇温過程で、はんだが溶融する前に気化するので、はんだ接合部のボイドの発生を抑制することができる。本実施形態においては、上記第1の部材にはんだ接合される部材が、本発明の第2の部材に相当する。例えば、放熱板6や接続端子5が第1の部材である場合、積層基板1が第2の部材に相当する。
ここで、半導体チップ3の電極、接続端子5や放熱板6に処理被膜2を形成しておいてもよい。
なお、半導体装置の製造工程において、金属部の表面に、処理剤を塗布し、上記処理被膜を形成する工程を備えてもよい。また、上記はんだを溶融させ、上記第1の部材と前記第2の部材とを接合する工程を、還元性雰囲気で行ってもよい。
積層基板1と、処理剤として本発明に用いる処理剤と、従来から防錆剤として用いられているベンゾトリアゾール系処理剤とを用意した。本発明に用いる処理剤2は、純正化学株式会社から購入したペンタン酸メチル1質量%と純水99質量パーセントを混合し、それを水酸化カリウムにてpH=11になるように調製したものである。形成された処理被膜は、気化温度が160〜190℃である。ベンゾトリアゾール系処理剤は、日本マクダーミッド株式会社の製品名Metex M667であり、ベンゾトリアゾール(BTA)を有効成分とし、イソプロピルアルコールを15〜25質量%、水酸化カリウムを1〜5質量%含有している。
積層基板1の表面に、処理被膜として本発明の処理被膜2をコーティング後、200℃で10秒保持する加熱を行った。
(比較例1)
比較のために、従来から防錆剤として用いられているベンゾトリアゾール系処理被膜を積層基板1の表面にコーティング後、一つの試料は200℃で10秒保持する加熱を、もう一つの試料は260℃で10秒保持する加熱を、もう一つの試料は320℃で10秒保持する加熱を行った。
その結果を表2に示し、また図8に棒グラフで示した。なお、表2及び図8中には、参考のために処理剤を塗布せず、また、加熱も行わなかった積層基板をXPSにより分析した結果も併せて示した。
(実施例2)
パワー半導体モジュールを組み立てるに際し、積層基板1の回路板1bを、本発明で用いる処理剤で表面処理した。表面処理後の当該回路板1bの表面にはんだ4を配置させ、はんだ4に対向させて半導体チップ3を配置した後、320℃に加熱して回路板1bと半導体チップ3とを接合した。処理剤は試験1で用いた処理剤と同じであった。はんだは、Sn−3%Ag−0.5%Cuはんだであり、固相線温度は217℃であった。
(比較例2)
比較のため、積層基板1の回路板1bを、従来から防錆剤として用いられているベンゾトリアゾール系処理剤で表面処理した以外は、上記実施例2と同様にして回路板1bと半導体チップ3とをはんだ接合した。
実施例2及び比較例2の試料について、観察した画像の模写図を図9及び図10に示す。図9及び図10は、パワー半導体モジュールを、絶縁基板1の表面に対して垂直な方向から見た画像であり、半導体チップ3の領域にボイドBDが観察される。図9が本発明で用いる処理剤で表面処理した場合であり、図10が従来から防錆剤として用いられているベンゾトリアゾール系処理剤で表面処理した場合である。図9と図10との対比から、本発明で用いる処理剤で表面処理した実施例2は、図10に示した比較例に比べてボイドBDが格段に減少していることが分かる。ボイドの面積率は、実施例2が0.2%であり、比較例2が4.2%であった。
1a 絶縁板
1b 回路板
1c 金属板
2 処理被膜
3 半導体チップ
4 はんだ
5 接続端子
6 放熱板
7 はんだ
21 パワー半導体モジュール
Claims (15)
- 金属部を備える第1の部材を有し、前記金属部が第2の部材とはんだで接合され得る半導体装置用部材の製造方法であって、
前記第1の部材を用意する工程と、
前記金属部の表面の全面を覆って、処理剤を塗布し、保管時又は輸送時の表面の化学変化を抑制し、はんだ接合時に前記はんだの固相線温度以下の温度で気化する処理被膜を形成する工程と、
を備える半導体装置用部材の製造方法。 - 前記処理被膜の気化温度が80〜250℃である請求項1記載の半導体装置用部材の製造方法。
- 前記処理剤が、カルボン酸、カルボン酸の金属塩、カルボン酸のアンモニウム塩、及びカルボン酸エステルから選ばれる少なくとも一種の有機物を含む請求項1記載の半導体装置用部材の製造方法。
- 前記有機物が、炭素数1〜25である請求項3記載の半導体装置用部材の製造方法。
- 前記有機物が、分子量30〜400g/molである請求項3記載の半導体装置用部材の製造方法。
- 前記はんだが、Ag、Cu、Sb、Ni、Ge、P、In、Bi及びPbから選ばれる少なくとも一種の金属と、Snとからなる合金である請求項1記載の半導体装置用部材の製造方法。
- 前記はんだが、板はんだである請求項1記載の半導体装置用部材の製造方法。
- 前記第1の部材が、半導体チップ、積層基板、放熱板、はんだ及び接続端子から選ばれる少なくとも一種の部材である請求項1記載の半導体装置用部材の製造方法。
- 前記第1の部材が、半導体装置の部材の一つである、絶縁板、回路板及び金属板を備える積層基板であり、前記回路板及び前記金属板の少なくとも一方の表面に、前記処理被膜を形成する、請求項1記載の半導体装置用部材の製造方法。
- 半導体装置の製造方法であって、
金属部を備える第1の部材を有し、前記金属部の表面の全面を覆って、保管時又は輸送時の表面の化学変化を抑制し、はんだ接合時にはんだの固相線温度以下の温度で気化する処理被膜が形成された半導体装置用部材を用意する工程と、
前記処理被膜を間に挟んで前記金属部と第2の部材が対向するように、前記第1の部材及び第2の部材を配置する工程と、
前記はんだが溶融する前に前記処理被膜を加熱、気化させた後、前記はんだを溶融させて、前記第1の部材と前記第2の部材とを接合する工程と、
を備える半導体装置の製造方法。 - 前記金属部の表面に、処理剤を塗布し、前記処理被膜を形成する工程をさらに備える請求項10記載の半導体装置の製造方法。
- 前記はんだを溶融させ、前記第1の部材と前記第2の部材とを接合する工程を、還元性雰囲気で行う請求項10記載の半導体装置の製造方法。
- 前記第1の部材が、半導体チップ、積層基板、放熱板及び接続端子から選ばれる少なく
とも一種の部材であり、
前記処理被膜と前記第2の部材の間にさらに前記はんだを配置し、前記第1の部材及び第2の部材を配置する請求項10記載の半導体装置の製造方法。 - 前記金属部が前記はんだである請求項10記載の半導体装置の製造方法。
- 他の部材とはんだで接合され得る金属部を備え、前記金属部の表面が、前記表面の全面を覆って、保管時又は輸送時の表面の化学変化を抑制し、はんだ接合時に前記はんだの固相線温度以下の温度で気化する処理被膜で被覆されている半導体装置用部材。
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