JP6435629B2 - 基板のドライエッチング方法 - Google Patents

基板のドライエッチング方法 Download PDF

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Publication number
JP6435629B2
JP6435629B2 JP2014087149A JP2014087149A JP6435629B2 JP 6435629 B2 JP6435629 B2 JP 6435629B2 JP 2014087149 A JP2014087149 A JP 2014087149A JP 2014087149 A JP2014087149 A JP 2014087149A JP 6435629 B2 JP6435629 B2 JP 6435629B2
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substrate
resist
plating layer
dry etching
layer
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Japanese (ja)
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JP2015207895A (ja
JP2015207895A5 (enrdf_load_stackoverflow
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尚広 中川
尚広 中川
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Seiko Epson Corp
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Seiko Epson Corp
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  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
JP2014087149A 2014-04-21 2014-04-21 基板のドライエッチング方法 Active JP6435629B2 (ja)

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JP2014087149A JP6435629B2 (ja) 2014-04-21 2014-04-21 基板のドライエッチング方法

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JP2014087149A JP6435629B2 (ja) 2014-04-21 2014-04-21 基板のドライエッチング方法

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JP2015207895A JP2015207895A (ja) 2015-11-19
JP2015207895A5 JP2015207895A5 (enrdf_load_stackoverflow) 2017-04-27
JP6435629B2 true JP6435629B2 (ja) 2018-12-12

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Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05243217A (ja) * 1992-02-28 1993-09-21 Nec Corp 半導体装置の製造方法
JP3421259B2 (ja) * 1997-12-25 2003-06-30 ティーディーケイ株式会社 エッチングマスク、その作製方法およびエッチング方法、並びに磁気ヘッドおよびその製造方法
JP4516538B2 (ja) * 2006-03-01 2010-08-04 住友電工デバイス・イノベーション株式会社 半導体装置の製造方法
JP5386962B2 (ja) * 2008-12-12 2014-01-15 三菱電機株式会社 エッチング方法およびエッチング方法を用いた半導体装置の製造方法

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