JP6335616B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

Info

Publication number
JP6335616B2
JP6335616B2 JP2014092259A JP2014092259A JP6335616B2 JP 6335616 B2 JP6335616 B2 JP 6335616B2 JP 2014092259 A JP2014092259 A JP 2014092259A JP 2014092259 A JP2014092259 A JP 2014092259A JP 6335616 B2 JP6335616 B2 JP 6335616B2
Authority
JP
Japan
Prior art keywords
memory
processor
ram
transistor
main memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2014092259A
Other languages
English (en)
Japanese (ja)
Other versions
JP2014232525A (ja
JP2014232525A5 (enExample
Inventor
耕平 豊高
耕平 豊高
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2014092259A priority Critical patent/JP6335616B2/ja
Publication of JP2014232525A publication Critical patent/JP2014232525A/ja
Publication of JP2014232525A5 publication Critical patent/JP2014232525A5/ja
Application granted granted Critical
Publication of JP6335616B2 publication Critical patent/JP6335616B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
    • G11C14/0009—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a DRAM cell
    • G11C14/0018—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a DRAM cell whereby the nonvolatile element is an EEPROM element, e.g. a floating gate or metal-nitride-oxide-silicon [MNOS] transistor
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3268—Power saving in hard disk drive
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3275—Power saving in memory, e.g. RAM, cache
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Thin Film Transistor (AREA)
  • Memory System (AREA)
  • Semiconductor Memories (AREA)
  • Power Sources (AREA)
  • Non-Volatile Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Dram (AREA)
JP2014092259A 2013-04-30 2014-04-28 半導体装置 Expired - Fee Related JP6335616B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2014092259A JP6335616B2 (ja) 2013-04-30 2014-04-28 半導体装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2013095552 2013-04-30
JP2013095552 2013-04-30
JP2014092259A JP6335616B2 (ja) 2013-04-30 2014-04-28 半導体装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2018088150A Division JP6505910B2 (ja) 2013-04-30 2018-05-01 半導体装置

Publications (3)

Publication Number Publication Date
JP2014232525A JP2014232525A (ja) 2014-12-11
JP2014232525A5 JP2014232525A5 (enExample) 2017-06-15
JP6335616B2 true JP6335616B2 (ja) 2018-05-30

Family

ID=51790350

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2014092259A Expired - Fee Related JP6335616B2 (ja) 2013-04-30 2014-04-28 半導体装置
JP2018088150A Expired - Fee Related JP6505910B2 (ja) 2013-04-30 2018-05-01 半導体装置

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2018088150A Expired - Fee Related JP6505910B2 (ja) 2013-04-30 2018-05-01 半導体装置

Country Status (2)

Country Link
US (1) US10141053B2 (enExample)
JP (2) JP6335616B2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3225303B2 (ja) 1992-07-30 2001-11-05 シントーファイン株式会社 モノカルボン酸モリブデンの製造方法

Families Citing this family (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9853053B2 (en) 2012-09-10 2017-12-26 3B Technologies, Inc. Three dimension integrated circuits employing thin film transistors
TWI618058B (zh) 2013-05-16 2018-03-11 半導體能源研究所股份有限公司 半導體裝置
WO2015097593A1 (en) 2013-12-27 2015-07-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP6607681B2 (ja) 2014-03-07 2019-11-20 株式会社半導体エネルギー研究所 半導体装置
TWI767772B (zh) 2014-04-10 2022-06-11 日商半導體能源研究所股份有限公司 記憶體裝置及半導體裝置
WO2015170220A1 (en) 2014-05-09 2015-11-12 Semiconductor Energy Laboratory Co., Ltd. Memory device and electronic device
DE112014006711B4 (de) 2014-05-30 2021-01-21 Semiconductor Energy Laboratory Co., Ltd. Halbleitervorrichtung, Herstellungsverfahren dafür und elektronische Vorrichtung
JP5901698B2 (ja) * 2014-06-17 2016-04-13 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ メモリ管理方法
CN107112049A (zh) 2014-12-23 2017-08-29 3B技术公司 采用薄膜晶体管的三维集成电路
TWI683365B (zh) 2015-02-06 2020-01-21 日商半導體能源研究所股份有限公司 裝置及其製造方法以及電子裝置
US9905700B2 (en) 2015-03-13 2018-02-27 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device or memory device and driving method thereof
KR102582523B1 (ko) 2015-03-19 2023-09-26 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 전자 기기
US9547361B2 (en) 2015-04-29 2017-01-17 Qualcomm Incorporated Methods and apparatuses for memory power reduction
CN107533860B (zh) 2015-05-28 2022-02-08 英特尔公司 具有非易失性留存的基于铁电的存储器单元
US10978489B2 (en) 2015-07-24 2021-04-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, display panel, method for manufacturing semiconductor device, method for manufacturing display panel, and information processing device
US10116749B2 (en) * 2015-08-31 2018-10-30 The Boeing Company Method for providing flight management system data to peripheral devices
WO2017038403A1 (ja) * 2015-09-01 2017-03-09 ソニー株式会社 積層体
US9564217B1 (en) * 2015-10-19 2017-02-07 United Microelectronics Corp. Semiconductor memory device having integrated DOSRAM and NOSRAM
US9741400B2 (en) 2015-11-05 2017-08-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, memory device, electronic device, and method for operating the semiconductor device
WO2017103737A1 (en) 2015-12-18 2017-06-22 Semiconductor Energy Laboratory Co., Ltd. Display panel, input/output device, data processing device, and method for manufacturing display panel
JP6822853B2 (ja) 2016-01-21 2021-01-27 株式会社半導体エネルギー研究所 記憶装置及び記憶装置の駆動方法
US10411013B2 (en) 2016-01-22 2019-09-10 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and memory device
US9847105B2 (en) * 2016-02-01 2017-12-19 Samsung Electric Co., Ltd. Memory package, memory module including the same, and operation method of memory package
US9965220B2 (en) 2016-02-05 2018-05-08 Qualcomm Incorporated Forced idling of memory subsystems
TWI614748B (zh) * 2016-05-11 2018-02-11 安托梅拉公司 用於減少列啟動電路功率及周邊漏洩之動態隨機存取記憶體架構及其相關方法
US10109342B2 (en) * 2016-05-11 2018-10-23 Atomera Incorporated Dram architecture to reduce row activation circuitry power and peripheral leakage and related methods
WO2018047035A1 (en) * 2016-09-12 2018-03-15 Semiconductor Energy Laboratory Co., Ltd. Memory device, driving method thereof, semiconductor device, electronic component, and electronic device
JP6999374B2 (ja) 2016-11-17 2022-01-18 株式会社半導体エネルギー研究所 電子機器、及びタッチパネル入力方法
WO2019175704A1 (ja) 2018-03-16 2019-09-19 株式会社半導体エネルギー研究所 電気モジュール、表示パネル、表示装置、入出力装置、情報処理装置、電気モジュールの作製方法
US10840240B2 (en) 2018-10-24 2020-11-17 Micron Technology, Inc. Functional blocks implemented by 3D stacked integrated circuit
JP2020148591A (ja) 2019-03-13 2020-09-17 セイコーエプソン株式会社 時計および時計の制御方法
KR20250099267A (ko) 2019-04-15 2025-07-01 양쯔 메모리 테크놀로지스 씨오., 엘티디. 프로세서 및 동적 랜덤 액세스 메모리를 갖는 본디드 반도체 장치 및 이를 형성하는 방법
CN112614831B (zh) 2019-04-15 2023-08-08 长江存储科技有限责任公司 具有处理器和异构存储器的一体化半导体器件及其形成方法
CN112510031B (zh) * 2019-04-30 2024-10-25 长江存储科技有限责任公司 具有处理器和nand闪存的键合半导体器件及其形成方法
WO2020245688A1 (ja) * 2019-06-04 2020-12-10 株式会社半導体エネルギー研究所 半導体装置、半導体ウエハ、及び電子機器
CN110764020B (zh) * 2019-10-30 2022-01-14 深圳市泰昂能源科技股份有限公司 变电站长电缆剩余电流检测方法、装置、设备及存储介质
WO2023209491A1 (ja) * 2022-04-29 2023-11-02 株式会社半導体エネルギー研究所 半導体装置

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0973777A (ja) * 1995-09-04 1997-03-18 Matsushita Electric Ind Co Ltd メモリ装置
TW591372B (en) * 2003-05-15 2004-06-11 High Tech Comp Corp Power control method of portable electronic device, portable electronic device and electronic system
JP4463503B2 (ja) * 2003-07-15 2010-05-19 株式会社ルネサステクノロジ メモリモジュール及びメモリシステム
US8010764B2 (en) * 2005-07-07 2011-08-30 International Business Machines Corporation Method and system for decreasing power consumption in memory arrays having usage-driven power management
US7663961B1 (en) * 2006-04-30 2010-02-16 Sun Microsystems, Inc. Reduced-power memory with per-sector power/ground control and early address
US20080005516A1 (en) * 2006-06-30 2008-01-03 Meinschein Robert J Memory power management through high-speed intra-memory data transfer and dynamic memory address remapping
US20080147457A1 (en) * 2006-12-15 2008-06-19 Rapp Roman A Systems and methods for handling attributes used for assignment generation in a value flow environment
JP5099317B2 (ja) 2007-05-17 2012-12-19 村田機械株式会社 電子機器
EP2169558B1 (en) * 2007-07-18 2015-01-07 Fujitsu Limited Memory refresh device and memory refresh method
KR101474344B1 (ko) * 2008-07-11 2014-12-18 시게이트 테크놀로지 엘엘씨 캐시 플러시 제어 방법 및 이를 이용한 데이터 저장 시스템
US8392736B2 (en) * 2009-07-31 2013-03-05 Hewlett-Packard Development Company, L.P. Managing memory power usage
US8296496B2 (en) * 2009-09-17 2012-10-23 Hewlett-Packard Development Company, L.P. Main memory with non-volatile memory and DRAM
US8461462B2 (en) 2009-09-28 2013-06-11 Kyocera Corporation Circuit substrate, laminated board and laminated sheet
WO2011077967A1 (en) * 2009-12-25 2011-06-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP2012033002A (ja) * 2010-07-30 2012-02-16 Toshiba Corp メモリ管理装置およびメモリ管理方法
JP5553309B2 (ja) 2010-08-11 2014-07-16 国立大学法人 東京大学 データ処理装置
JP2012064158A (ja) * 2010-09-17 2012-03-29 Toshiba Corp メモリ管理装置及びメモリ管理方法
US8990538B2 (en) * 2010-11-05 2015-03-24 Microsoft Corporation Managing memory with limited write cycles in heterogeneous memory systems
US9235500B2 (en) * 2010-12-07 2016-01-12 Microsoft Technology Licensing, Llc Dynamic memory allocation and relocation to create low power regions
US9405357B2 (en) * 2013-04-01 2016-08-02 Advanced Micro Devices, Inc. Distribution of power gating controls for hierarchical power domains

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3225303B2 (ja) 1992-07-30 2001-11-05 シントーファイン株式会社 モノカルボン酸モリブデンの製造方法

Also Published As

Publication number Publication date
US20140325249A1 (en) 2014-10-30
JP6505910B2 (ja) 2019-04-24
JP2014232525A (ja) 2014-12-11
JP2018163666A (ja) 2018-10-18
US10141053B2 (en) 2018-11-27

Similar Documents

Publication Publication Date Title
JP6335616B2 (ja) 半導体装置
JP7153116B2 (ja) 半導体装置
US20150370313A1 (en) Semiconductor device
JP6953483B2 (ja) 半導体装置
US9312269B2 (en) Semiconductor device
JP6756888B2 (ja) 演算処理装置の駆動方法
JP2017212022A (ja) 半導体装置、電子部品、および電子機器
JP2014002726A (ja) 半導体装置およびその駆動方法
US9257173B2 (en) Arithmetic processing unit and driving method thereof
JP7083607B2 (ja) 記憶装置
JP6420165B2 (ja) 半導体装置
JP2025133066A (ja) 半導体装置
WO2023199182A1 (ja) 半導体装置
JP2025118557A (ja) 半導体装置、記憶装置

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20170426

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20170426

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20180117

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20180130

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20180319

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20180403

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20180501

R150 Certificate of patent or registration of utility model

Ref document number: 6335616

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees