JP6059912B2 - Ｓｏｉ基板の作製方法 - Google Patents

Ｓｏｉ基板の作製方法 Download PDF

Info

Publication number
JP6059912B2
JP6059912B2 JP2012183762A JP2012183762A JP6059912B2 JP 6059912 B2 JP6059912 B2 JP 6059912B2 JP 2012183762 A JP2012183762 A JP 2012183762A JP 2012183762 A JP2012183762 A JP 2012183762A JP 6059912 B2 JP6059912 B2 JP 6059912B2
Authority
JP
Japan
Prior art keywords
film
substrate
semiconductor
layer
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2012183762A
Other languages
English (en)
Japanese (ja)
Other versions
JP2013062499A (ja
JP2013062499A5 (enExample
Inventor
博史 大木
博史 大木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2012183762A priority Critical patent/JP6059912B2/ja
Publication of JP2013062499A publication Critical patent/JP2013062499A/ja
Publication of JP2013062499A5 publication Critical patent/JP2013062499A5/ja
Application granted granted Critical
Publication of JP6059912B2 publication Critical patent/JP6059912B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Recrystallisation Techniques (AREA)
JP2012183762A 2011-08-23 2012-08-23 Ｓｏｉ基板の作製方法 Expired - Fee Related JP6059912B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2012183762A JP6059912B2 (ja) 2011-08-23 2012-08-23 Ｓｏｉ基板の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2011181744 2011-08-23
JP2011181744 2011-08-23
JP2012183762A JP6059912B2 (ja) 2011-08-23 2012-08-23 Ｓｏｉ基板の作製方法

Publications (3)

Publication Number Publication Date
JP2013062499A JP2013062499A (ja) 2013-04-04
JP2013062499A5 JP2013062499A5 (enExample) 2015-09-17
JP6059912B2 true JP6059912B2 (ja) 2017-01-11

Family

ID=47744302

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012183762A Expired - Fee Related JP6059912B2 (ja) 2011-08-23 2012-08-23 Ｓｏｉ基板の作製方法

Country Status (2)

Country Link
US (1) US8772130B2 (enExample)
JP (1) JP6059912B2 (enExample)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013183001A (ja) 2012-03-01 2013-09-12 Semiconductor Energy Lab Co Ltd 半導体装置
US9721832B2 (en) * 2013-03-15 2017-08-01 Kulite Semiconductor Products, Inc. Methods of fabricating silicon-on-insulator (SOI) semiconductor devices using blanket fusion bonding
KR102052075B1 (ko) * 2013-03-28 2020-01-09 삼성디스플레이 주식회사 증착 장치, 이를 이용한 박막 형성 방법, 유기 발광 표시 장치 및 유기 발광 표시 장치 제조 방법
TWI620324B (zh) * 2013-04-12 2018-04-01 半導體能源研究所股份有限公司 半導體裝置
DE102014019794B4 (de) 2013-05-20 2024-10-24 Semiconductor Energy Laboratory Co., Ltd. Halbleitervorrichtung
JP6345544B2 (ja) * 2013-09-05 2018-06-20 株式会社半導体エネルギー研究所 半導体装置の作製方法
KR102244460B1 (ko) * 2013-10-22 2021-04-23 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
US9455349B2 (en) * 2013-10-22 2016-09-27 Semiconductor Energy Laboratory Co., Ltd. Oxide semiconductor thin film transistor with reduced impurity diffusion
WO2015097596A1 (en) * 2013-12-26 2015-07-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US10361290B2 (en) * 2014-03-14 2019-07-23 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device comprising adding oxygen to buffer film and insulating film
KR20160034200A (ko) * 2014-09-19 2016-03-29 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치의 제작 방법
US20160155849A1 (en) * 2014-12-02 2016-06-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, method for manufacturing semiconductor device, module, and electronic device
US9653613B2 (en) * 2015-02-27 2017-05-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
CN116154003A (zh) 2015-11-20 2023-05-23 株式会社半导体能源研究所 半导体装置、包括该半导体装置的显示装置以及包括该半导体装置的电子设备
US10020336B2 (en) 2015-12-28 2018-07-10 Semiconductor Energy Laboratory Co., Ltd. Imaging device and electronic device using three dimentional (3D) integration
US9905579B2 (en) * 2016-03-18 2018-02-27 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and display device including the semiconductor device
US12349481B2 (en) 2018-09-21 2025-07-01 Semiconductor Energy Laboratory Co., Ltd. Imaging device, manufacturing method thereof, and electronic device
WO2020089762A1 (ja) 2018-11-02 2020-05-07 株式会社半導体エネルギー研究所 半導体装置
US12376410B2 (en) 2019-07-04 2025-07-29 Semiconductor Energy Laboratory Co., Ltd. Imaging device with embedded conductive layers
CN114420549B (zh) * 2022-03-31 2022-11-18 深圳新声半导体有限公司 一种二氧化硅表面与硅表面低温键合的方法
WO2024192097A1 (en) 2023-03-14 2024-09-19 Atomera Incorporated Method for making a radio frequency silicon-on-insulator (rfsoi) wafer including a superlattice

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3298974B2 (ja) 1993-03-23 2002-07-08 電子科学株式会社 昇温脱離ガス分析装置
US6027988A (en) * 1997-05-28 2000-02-22 The Regents Of The University Of California Method of separating films from bulk substrates by plasma immersion ion implantation
JP3582566B2 (ja) * 1997-12-22 2004-10-27 三菱住友シリコン株式会社 Ｓｏｉ基板の製造方法
JP2000124092A (ja) 1998-10-16 2000-04-28 Shin Etsu Handotai Co Ltd 水素イオン注入剥離法によってｓｏｉウエーハを製造する方法およびこの方法で製造されたｓｏｉウエーハ
US6995075B1 (en) * 2002-07-12 2006-02-07 Silicon Wafer Technologies Process for forming a fragile layer inside of a single crystalline substrate
JP2005079394A (ja) * 2003-09-01 2005-03-24 Sumitomo Mitsubishi Silicon Corp ダミーウェーハ
JP2005085964A (ja) * 2003-09-08 2005-03-31 Sumitomo Mitsubishi Silicon Corp 貼り合わせ基板の製造方法
JP2005086041A (ja) * 2003-09-09 2005-03-31 Sumitomo Mitsubishi Silicon Corp 半導体ウェーハのイオン注入方法
WO2006035864A1 (ja) * 2004-09-30 2006-04-06 Shin-Etsu Handotai Co., Ltd. Ｓｏｉウエーハの洗浄方法
US8420456B2 (en) 2007-06-12 2013-04-16 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing for thin film transistor
US7763502B2 (en) * 2007-06-22 2010-07-27 Semiconductor Energy Laboratory Co., Ltd Semiconductor substrate, method for manufacturing semiconductor substrate, semiconductor device, and electronic device
US8049253B2 (en) 2007-07-11 2011-11-01 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
US8067793B2 (en) 2007-09-27 2011-11-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device including storage capacitor with yttrium oxide capacitor dielectric
KR101499175B1 (ko) * 2007-10-04 2015-03-05 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 기판의 제조방법
US7851318B2 (en) 2007-11-01 2010-12-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor substrate and method for manufacturing the same, and method for manufacturing semiconductor device
SG160300A1 (en) 2008-10-03 2010-04-29 Semiconductor Energy Lab Method for manufacturing soi substrate
US8288249B2 (en) 2010-01-26 2012-10-16 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate

Also Published As

Publication number Publication date
JP2013062499A (ja) 2013-04-04
US20130052799A1 (en) 2013-02-28
US8772130B2 (en) 2014-07-08

Similar Documents

Publication Publication Date Title
JP6059912B2 (ja) Ｓｏｉ基板の作製方法
JP6713078B2 (ja) 半導体装置
JP6650014B2 (ja) 半導体装置
JP6088312B2 (ja) 半導体装置
JP5702814B2 (ja) 半導体装置
JP6034670B2 (ja) 半導体装置の作製方法
US8916424B2 (en) Method for manufacturing semiconductor device
JP5917842B2 (ja) 半導体装置
TWI845271B (zh) 半導體裝置和製造半導體裝置的方法
US9875910B2 (en) Wiring board, semiconductor device, and manufacturing methods thereof
KR102107255B1 (ko) 반도체 장치
JP6080563B2 (ja) 半導体装置の作製方法
KR20150005541A (ko) 절연막, 반도체 장치의 제작 방법, 및 반도체 장치
TW202425354A (zh) 半導體裝置
TW201140808A (en) Semiconductor device
JP6050662B2 (ja) 半導体装置及び半導体装置の作製方法
JP6031252B2 (ja) 半導体装置、記憶装置および半導体装置の作製方法
JP5960430B2 (ja) 半導体装置の作製方法
JP6505769B2 (ja) 半導体装置

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20150803

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20150803

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20160426

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20160531

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20160629

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20161206

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20161212

R150 Certificate of patent or registration of utility model

Ref document number: 6059912

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees