JP6014845B1 - Overlay mark, overlay measurement method using the same, and semiconductor device manufacturing method - Google Patents

Abstract

A new overlay mark is provided for confirming whether or not a pattern layer is accurately aligned in a semiconductor manufacturing process. An overlay mark 400 for determining a relative shift between two continuous pattern layers or two patterns formed separately in one pattern layer, the first overlay structure 410 having a square shape, The first overlay structure includes four overlay patterns 421 to 424 arranged on the top, bottom, left, and right, respectively, and each of the four overlay patterns includes a second overlay structure 420 including a plurality of bars 425a to 428d arranged side by side. . [Selection] Figure 7

Description

  The present invention relates to an overlay mark, an overlay measurement method using the overlay mark, and a semiconductor device manufacturing method.

  A plurality of pattern layers are sequentially formed on the semiconductor substrate. Also, a single layer circuit may be formed in two patterns by double patterning or the like. If these pattern layers or a plurality of patterns of one layer are not accurately formed at preset positions, a desired semiconductor device cannot be manufactured.

  Therefore, an overlay mark formed simultaneously with the pattern layer is used to confirm whether the pattern layer is accurately aligned.

  A method for measuring an overlay using an overlay mark is as follows. First, one structure which is a part of the overlay mark is formed simultaneously with the formation of the pattern layer in the pattern layer formed in the previous process, for example, the etching process. Then, the remaining structure of the overlay mark is formed on the photoresist in a subsequent process, for example, a photolithography process. Then, the overlay measurement device obtains an image of the overlay structure of the pattern layer formed in the previous step (acquires an image through the photoresist layer) and an overlay structure of the photoresist layer, and the center of these images. Measure the offset value between to measure the overlay value. If the overlay value exceeds the acceptable range, remove the photoresist layer and rework.

Japanese Patent No. 5180419

  An object of the present invention is to provide a new overlay mark that is formed simultaneously with a pattern layer in order to confirm whether the pattern layer is accurately aligned in a semiconductor manufacturing process.

In order to achieve the above-described object, the present invention provides an overlay that determines (or measures) a relative shift between two consecutive pattern layers or two patterns formed separately in one pattern layer. A mesa structure formed at a corner portion of each square and a central portion of each side, the mesa structure including a first overlay structure connected by a plurality of trenches arranged in parallel; Four overlay patterns arranged on the top, bottom, left, and right of the first overlay structure, each of the four overlay patterns comprising a plurality of bars aligned with each other, the plurality of bars from the first overlay structure The second overlay structure including the trench structure and the mesa structure alternately formed along the length direction becomes longer as the distance increases. And the first overlay structure and the second overlay structure are formed in different pattern layers, or are formed together with different patterns separately formed in one pattern layer. Provide the mark.

  In the overlay mark, the areas of the bars are preferably equal to each other.

  The trench structure preferably includes a plurality of trenches arranged in parallel, and the first-stage mesa structure more preferably includes a plurality of mesas arranged in parallel.

  In addition, a circular structure formed in the first overlay structure may be further included to measure a critical dimension.

  The second overlay structure may be invariant with respect to a 90 degree rotation.

  Further, the interval between the plurality of bars of the overlay pattern may be constant.

  Of the four overlay patterns in the previous period, the overlay pattern bars arranged above and below the first overlay structure and the overlay pattern bars arranged on the left and right sides of the first overlay structure may be orthogonal to each other. .

  In addition, it is preferable that the rotation centers of the first overlay structure and the second overlay structure coincide.

  The second overlay structure may be formed in a pattern layer formed in a previous process, and the first overlay structure may be formed in a pattern layer formed in a subsequent process.

  The present invention further includes forming an overlay mark at the same time as forming two continuous pattern layers or two patterns separately formed in one pattern layer, and measuring an overlay value using the overlay mark And using the measured overlay value for process control to form two consecutive pattern layers or two patterns formed separately in one pattern layer, the overlay mark comprising the overlay Provided is a method for manufacturing a semiconductor element, which is a mark.

  And forming two continuous pattern layers or two patterns separately formed on one pattern layer, obtaining an image of the overlay mark formed simultaneously, and analyzing the image of the overlay mark The overlay mark is the overlay mark described above, and provides an overlay measurement method.

The overlay mark according to the present invention can be used as a mark for confirming whether or not the pattern layer is accurately aligned in the semiconductor manufacturing process. It can also be used as a mark for confirming whether a plurality of patterns of one layer are accurately aligned.

It is the top view which showed one Example of the overlay mark which concerns on this invention. FIG. 2 is an enlarged cross-sectional view of a part of the overlay pattern illustrated in FIG. 1. It is the top view which showed other Examples of the overlay mark which concerns on this invention. It is the top view which showed other Example of the overlay mark which concerns on this invention. FIG. 5 is a cross-sectional view of any one bar of the second overlay structure shown in FIG. 4. 6 is a diagram for explaining measurement inaccuracy due to asymmetry of a general overlay mark. It is the top view which showed a part of other Example of the overlay mark which concerns on this invention.

  Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the embodiments of the present invention can be modified in various forms, and the scope of the present invention should not be construed as being limited to the following embodiments. The embodiments of the present invention are provided to explain the present invention in more detail to those having ordinary skill in the art. Accordingly, the shapes of elements in the drawings are exaggerated for a clearer description, and elements denoted by the same reference numerals in the drawings mean the same elements.

  FIG. 1 is a plan view showing an embodiment of an overlay mark according to the present invention. Referring to FIG. 1, an embodiment of an overlay mark 100 according to the present invention includes a first overlay structure 110 and a second overlay structure 120. An overlay mark 100 may be formed on the scribe lane of the wafer to provide an overlay between two or more pattern layers on the wafer or between two or more patterns on a single layer.

  When used to measure overlay between different pattern layers, the first overlay structure 110 and the second overlay structure 120 are formed in different pattern layers. Also, when used for overlay measurement between different patterns of the same layer, for example, two patterns formed in a double patterning process, the first overlay structure 110 and the second overlay structure 120 are formed in the same layer. The At this time, the first overlay structure 110 and the second overlay structure 120 are formed in the same layer by different processes. Hereinafter, for convenience, description will be made based on overlay measurement between different pattern layers.

  As shown in FIG. 1, in the present embodiment, the first overlay structure 110 has a square shape. Two opposite sides of the first overlay structure 110 are parallel to the first direction, and the remaining two sides are parallel to a second direction orthogonal to the first direction. The first direction and the second direction may be the X-axis direction and the Y-axis direction, respectively.

  The second overlay structure 120 includes four overlay patterns 121, 122, 123, and 124 arranged on the top, bottom, left, and right of the first overlay structure 110, respectively. Each of the four overlay patterns 121, 122, 123, and 124 includes a plurality of bars 125, 126, 127, and 128 aligned with each other. The plurality of bars 125, 126, 127, and 128 of each overlay pattern 121, 122, 123, and 124 are arranged at regular intervals. The lengths and widths of the plurality of bars 125, 126, 127, and 128 of the overlay patterns 121, 122, 123, and 124 are also equal to each other.

  Of the four overlay patterns 121, 122, 123, 124, the bars 127, 128 of the overlay patterns 123, 124 arranged above and below the first overlay structure 110 and the overlays arranged on the left and right of the first overlay structure 110 The bars 125 and 126 of the patterns 121 and 122 are orthogonal to each other. The bars 127 and 128 of the overlay patterns 123 and 124 arranged above and below the first overlay structure 110 are arranged along the Y-axis direction in a shape extending long in the X-axis direction, and arranged on the left and right sides of the first overlay structure 110. The bars 125 and 126 of the overlay patterns 121 and 122 are arranged along the X-axis direction in a shape extending long in the Y-axis direction. The left and right overlay patterns 121 and 122 can be used for measurement of overlay in the X-axis direction, and the upper and lower overlay patterns 123 and 124 can be used for measurement of overlay in the Y-axis direction.

  Since both the first overlay structure 110 and the second overlay structure 120 are invariant to 90-degree rotation, and the rotation centers C of the first overlay structure 110 and the second overlay structure 120 coincide, The mark 100 as a whole is invariant with respect to 90-degree rotation.

  On the other hand, although it may be formed in reverse, the second overlay structure 120 is formed in the pattern layer formed in the previous process, and the first overlay structure 110 is formed in the pattern layer formed in the subsequent process. It is preferable. Since the pattern layer formed in the pre-process is covered with the pattern layer formed in the post-process, it is difficult to obtain an accurate image compared to the pattern layer formed in the post-process. Therefore, it is advantageous to form the second overlay structure 120 that facilitates more accurate measurement in the previous step.

  FIG. 2 is an enlarged cross-sectional view of a part of the overlay pattern shown in FIG. As shown in FIG. 2, the plurality of bars 125, 126, 127, and 128 of the overlay patterns 121, 122, 123, and 124 preferably include a plurality of fine bars 130. Having an overlay mark 100 having a spacing and width similar to the predetermined spacing and width in the design rules applied to the die area of the wafer reduces errors between the overlay of the actual die area and the overlay measured by the overlay mark. Because it helps. The plurality of fine bars 130 may be formed at the same interval.

  FIG. 3 is a plan view showing another embodiment of the overlay mark according to the present invention. The embodiment shown in FIG. 3 is different from the embodiment shown in FIG. 1 in the second overlay structure 220 and will be described only here. In the embodiment shown in FIG. 3, unlike the embodiment shown in FIG. 1, the second overlay structure 220 is variable with respect to 90-degree rotation. It is also a variable body with respect to 180 ° rotation. In the present embodiment, the overlay patterns 221, 222, 223, and 224 of the second overlay structure 220 are configured such that the bars 225 and 226, 227 and 228 of the opposing overlay patterns 221 and 222, 223 and 224 are orthogonal to each other. The

  Hereinafter, an overlay measurement method using the overlay mark 100 shown in FIG. 1 will be described. The overlay measurement method includes a step of acquiring an image of the overlay mark 100 and a step of analyzing the image of the overlay mark 100. The overlay mark 100 is formed at the same time as forming two continuous pattern layers or two patterns formed separately in one pattern layer.

  Obtaining an image of overlay mark 100 includes obtaining an image of first overlay structure 110, obtaining an image of second overlay structure 120, and obtaining a combined image of these images. But you can.

  When the first overlay structure 110 and the second overlay structure 120 are formed in different layers, images may be acquired using different light sources. Since the second overlay structure 120 formed in the previous process is covered with the pattern layer formed in the subsequent process, an image is obtained using light having a wavelength that can pass through the pattern layer formed in the subsequent process. It is preferable to do.

  The step of analyzing the image of the overlay mark 100 may be a step of measuring an offset between the center of the first overlay structure 110 and the center of the second overlay structure 120 from the acquired combined image. Further, a step of measuring a distance between a line corresponding to a center of the second overlay structure 120 and an inner end of the first overlay structure 110 may be performed.

  Hereinafter, a method for manufacturing a semiconductor device using the overlay mark 100 shown in FIG. 1 will be described. A method of manufacturing a semiconductor device using the overlay mark 100 starts with a step of forming the overlay mark 100. The overlay mark 100 is formed at the same time as forming two continuous pattern layers or two patterns formed separately in one pattern layer.

  Next, the overlay value is measured using the overlay mark 100. The step of measuring the overlay value is the same as the overlay measuring method described above.

  Finally, the measured overlay value is used for process control to form two consecutive pattern layers or two patterns formed separately on one pattern layer. That is, the derived overlay is used for process control so that a continuous pattern layer or two patterns are formed at predetermined positions.

  FIG. 4 is a plan view showing still another embodiment of the overlay mark according to the present invention, and FIG. 5 is a view showing a cross section of any one bar of the second overlay structure shown in FIG. .

  Referring to FIG. 4, the present embodiment includes a first overlay structure 310, a second overlay structure 320, and a circular structure 330. A circular structure 330 is formed inside the first overlay structure 310. The circular structure 330 enables an approximate critical dimension measurement based on the optical image. By utilizing this, process stability can be ensured in the semiconductor manufacturing process. In addition, the circular structure 330 can more stably perform target centering, which is a process for creating a more unique environment and measuring overlay when performing pattern recognition by the first overlay structure 310. It can also play a role.

  As shown in FIG. 4, in this embodiment, the first overlay structure 310 is square. The second overlay structure 320 includes four overlay patterns 321, 322, 323, and 324 disposed on the top, bottom, left, and right of the first overlay structure 310, respectively. Each of the four overlay patterns 321, 322, 323, and 324 includes a plurality of bars 325, 326, 327, and 328 arranged side by side. The plurality of bars 325, 326, 327, 328 of each overlay pattern 321, 322, 323, 324 are arranged at regular intervals.

The feature of this embodiment that is different from the embodiment shown in FIG. 1 is that the lengths and widths of the plurality of bars 325a, 325b, 325c, 325d, and 325e constituting one overlay pattern (for example, 321) are different. is there. The plurality of bars 325a, 325b, 325c, 325d, and 325e are longer and farther away from the first overlay structure 310 so that the areas of the bars 325a, 325b, 325c, 325d, and 325e are equal to each other. Becomes narrower. That is, the innermost bar 325a has the shortest length and the widest width, and the outermost bar 325e has the longest length and the smallest width.
In this embodiment, such a structure has an advantage that even when defocus occurs, it is easy to ensure the precision as compared with the case where a bar having a single width is provided. In addition, since it is possible to secure a greater amount of light intensity (intensity) information in a region closer to the optical center than when a single-width bar is provided, in combination with the following mesa and trench type, There is an advantage that it is easy to ensure the precision.

  Another feature of this embodiment, which differs from the embodiment shown in FIG. 1, is that the sides of the first overlay structure 310 and the bars 325, 326, 327, 328 of the second overlay structure 320 are mesa along the length direction. (Mesa, M) and trench (trenches, T) structures are alternately formed. The portion shown dark in FIG. 4 is the concave portion. In the embodiment shown in FIG. 4, it is shown that 1/5 area is allocated to each of the mesa-trench-mesa-trench-mesa, but it is divided into different areas as required. May be.

  The application of such a structure has an advantage that errors caused by process asymmetry during the production of the overlay mark can be reduced.

  As shown in FIG. 6, when an overlay structure is manufactured by a semiconductor process, the angles (α, β) of the slopes on both sides of the structure may be different. These asymmetries can be generated in semiconductor processes such as CMP (chemical mechanical polishing), CVD (chemical vapor deposition), and RIE (reactive-ion etching). When all of the overlay structure of the same layer is manufactured in the trench structure or the mesa structure, the overlay depends on the height of the focus and the wavelength band of the light used for the measurement due to the asymmetry during the production of these overlay marks. There is a problem that the measured values are differently measured.

  However, as shown in FIGS. 4 and 5, when an overlay structure in which a trench structure and a mesa structure are alternately formed in the same layer is used, an error in the trench structure and an error in the mesa structure are partly. This has the advantage that it can be offset to minimize measurement inaccuracies. In other words, when forming a structure in a semiconductor process, the asymmetry appears differently depending on whether the structure is a mesa structure or a trench structure, so that the error may be partially offset. It is also possible to increase the accuracy of overlay measurement by measuring the magnitude of the error. For example, the overlay structure may be inaccurate by calculating the difference between the center point of a pair of trench structures located at the same distance from the center of the overlay mark and the center point of a pair of mesa structures located at the same distance from the center. The accuracy of the overlay measurement. Further, by measuring the error in the trench structure and the error in the mesa structure, and using the measurement value of the structure with a small error, the overlay measurement accuracy can be improved.

  FIG. 7 is a plan view of still another embodiment of an overlay mark according to the present invention. As shown in the figure, an overlay mark 400 that determines (or measures) a relative shift between two continuous pattern layers or two patterns separately formed in one pattern layer is a square, The mesa structure M is formed in the corner portion and the central portion of each side. The mesa structure M includes a first overlay structure 410 connected by a plurality of trenches arranged in parallel, and the first overlay structure 410. Each of the four overlay patterns 421, 422, 423, 424 includes a plurality of bars 425, 426, 427, 428 arranged side by side. And the plurality of bars 425, 426, 427, 428 are separated from the first overlay structure 410. A second overlay structure 420 having a trench structure T and a mesa structure M alternately formed along the length direction. The first overlay structure 410 and the second overlay structure are included. The structure 420 is characterized in that it is formed in different pattern layers or together with different patterns formed separately in one pattern layer.

  In the overlay mark 400, the bars 425, 426, 427, and 428 preferably have the same area.

  The trench structure T of the plurality of bars 425, 426, 427, and 428 preferably includes a plurality of trenches arranged in parallel, and the mesa structure M of the plurality of bars 425, 426, 427, and 428 is More preferably, it includes a plurality of mesas arranged in parallel.

  In addition, a circular structure 430 formed in the first overlay structure 410 may be further included for the measurement of critical dimensions.

  In addition, the second overlay structure 420 may be invariant with respect to a 90 degree rotation. Further, the interval between the plurality of bars 425, 426, 427, 428 of the previous overlay pattern 421, 422, 423, 424 may be constant.

  Of the four overlay patterns 421, 422, 423, and 424 in the previous period, the bars 427 and 428 of the overlay patterns 423 and 424 disposed above and below the first overlay structure 410 and the left and right sides of the first overlay structure 410, respectively. The bars 425 and 426 of the overlay patterns 421 and 422 to be arranged may be orthogonal to each other.

  In addition, it is preferable that the rotation centers of the first overlay structure 410 and the second overlay structure 420 coincide.

  The second overlay structure 420 may be formed in a pattern layer formed in a previous process, and the first overlay structure 410 may be formed in a pattern layer formed in a subsequent process.

  The present invention further includes forming an overlay mark 400 at the same time as forming two continuous pattern layers or two patterns formed separately in one pattern layer, and measuring the overlay value using the overlay mark 400 And using the measured overlay value for process control to form two successive pattern layers or two patterns formed separately in one pattern layer, the overlay mark 400 comprising: A method of manufacturing a semiconductor device, characterized in that it is the overlay mark 400 described above.

  Also, the step of obtaining an image of the overlay mark 400 formed at the same time as forming two continuous pattern layers or two patterns separately formed in one pattern layer, and analyzing the image of the overlay mark 400 The overlay mark 400 is the overlay mark 400 described above, and provides an overlay measurement method.

  In this embodiment, unlike the embodiment shown in FIG. 5, two or more trenches and / or mesas aligned with each other are alternately arranged along the length direction. Only the trench structure is formed with two or more trenches aligned with each other, the mesa structure is formed with two or more mesas aligned with each other, or both the trench structure and the mesa structure are formed with two or more aligned with each other can do. The structure of this embodiment has the advantage of improving the signal strength.

  The embodiments described above are merely preferred embodiments of the present invention, and the scope of the present invention is not limited to the described embodiments, but the technical idea and claims of the present invention. Various changes, modifications, or substitutions may be made by those having ordinary knowledge in the art, and these examples should be understood to be within the scope of the present invention.

100, 200, 300, 400 Overlay mark 110, 310, 410 First overlay structure 120, 220, 320, 420 Second overlay structure 121, 122, 123, 124 Overlay pattern 125, 126, 127, 128 Bar 130 Fine bar 221, 222, 223, 224 Overlay pattern 225, 226, 227, 228 Bar 321, 322, 323, 324 Overlay pattern 421, 422, 423, 424 Overlay pattern 425, 426, 427, 428 Bar 430 Circular structure

Claims (10)

An overlay mark 400 for determining a relative shift between two consecutive pattern layers or two patterns formed separately in one pattern layer,
A mesa structure M is formed at a corner portion of the square and a central portion of each side, and the mesa structure M includes a first overlay structure 410 connected by a plurality of trenches arranged in parallel;
The first overlay structure 410 includes four overlay patterns 421, 422, 423, and 424 disposed on the top, bottom, left, and right, respectively, and each of the four overlay patterns 421, 422, 423, and 424 includes a plurality of bars arranged side by side. 425, 426, 427, and 428, and the plurality of bars 425, 426, 427, and 428 increase in length as the distance from the first overlay structure 410 increases, and the width decreases and alternates along the length direction. A second overlay structure 420 comprising a trench structure T and a mesa structure M formed in
The overlay mark, wherein the first overlay structure 410 and the second overlay structure 420 are formed together with different patterns formed in different pattern layers or separately formed in one pattern layer.   The overlay mark according to claim 1, wherein the areas of the bars (425, 426, 427, 428) are equal to each other.   The overlay mark according to claim 1, wherein the trench structure T of the plurality of bars 425, 426, 427, 428 includes a plurality of trenches arranged in parallel.   The overlay mark according to claim 1, wherein the mesa structure M of the plurality of bars 425, 426, 427, 428 includes a plurality of mesas arranged in parallel. For the measurement of critical dimension (critical dimension), overlay mark of claim 1, further comprising a circular structure 430 which is formed inside the first overlay structure 410.   The overlay mark according to claim 1, wherein the second overlay structure 420 is invariant with respect to a rotation of 90 degrees. The overlay mark according to claim 1, wherein a distance between the overlay patterns 421, 422, 423, 424 and the plurality of bars 425, 426, 427, 428 is constant.   The overlay mark according to claim 1, wherein the rotation centers of the first overlay structure 410 and the second overlay structure 420 coincide. In a method for manufacturing a semiconductor element,
Forming the overlay mark 400 at the same time as forming two continuous pattern layers or two patterns formed separately in one pattern layer;
Measuring an overlay value using the overlay mark 400;
Using the measured overlay value to process control to form two consecutive pattern layers or two patterns formed separately in one pattern layer, and
The overlay mark 400, a method of manufacturing a semiconductor device, characterized in that an overlay mark 400 according to any one of claims 1 to 8. A method for measuring an overlay between two patterns or two patterns separately formed on one pattern layer,
Obtaining an image of the overlay mark 400 formed simultaneously with forming two continuous pattern layers or two patterns formed separately in one pattern layer;
Analyzing the image of the overlay mark 400;
9. The overlay measuring method according to claim 1, wherein the overlay mark 400 is the overlay mark 400 according to any one of claims 1 to 8 .

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