JP5979530B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- JP5979530B2 JP5979530B2 JP2011235436A JP2011235436A JP5979530B2 JP 5979530 B2 JP5979530 B2 JP 5979530B2 JP 2011235436 A JP2011235436 A JP 2011235436A JP 2011235436 A JP2011235436 A JP 2011235436A JP 5979530 B2 JP5979530 B2 JP 5979530B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- bus line
- gate
- gate bus
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28264—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being a III-V compound
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10D64/251—Source or drain electrodes for field-effect devices
- H10D64/257—Source or drain electrodes for field-effect devices for lateral devices wherein the source or drain electrodes are characterised by top-view geometrical layouts, e.g. interdigitated, semi-circular, annular or L-shaped electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/10—Integrated device layouts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/015—Manufacture or treatment of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
- H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
- H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
- H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Junction Field-Effect Transistors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
- General Engineering & Computer Science (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011235436A JP5979530B2 (ja) | 2011-10-26 | 2011-10-26 | 半導体装置の製造方法 |
| US13/661,471 US9196492B2 (en) | 2011-10-26 | 2012-10-26 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011235436A JP5979530B2 (ja) | 2011-10-26 | 2011-10-26 | 半導体装置の製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2013093477A JP2013093477A (ja) | 2013-05-16 |
| JP2013093477A5 JP2013093477A5 (enExample) | 2014-12-11 |
| JP5979530B2 true JP5979530B2 (ja) | 2016-08-24 |
Family
ID=48172836
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011235436A Active JP5979530B2 (ja) | 2011-10-26 | 2011-10-26 | 半導体装置の製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US9196492B2 (enExample) |
| JP (1) | JP5979530B2 (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140239349A1 (en) * | 2013-02-25 | 2014-08-28 | International Rectifier Corporation | Drain Pad Having a Reduced Termination Electric Field |
| CN104409431B (zh) * | 2014-10-24 | 2017-07-04 | 苏州能讯高能半导体有限公司 | 一种半导体器件 |
| JP6067151B2 (ja) * | 2014-12-16 | 2017-01-25 | 三菱電機株式会社 | マルチフィンガトランジスタ及び半導体装置 |
| US12464760B2 (en) | 2016-03-17 | 2025-11-04 | Macom Technology Solutions Holdings, Inc. | Bypassed gate transistors having improved stability |
| US10128365B2 (en) | 2016-03-17 | 2018-11-13 | Cree, Inc. | Bypassed gate transistors having improved stability |
| DE102016205079B4 (de) * | 2016-03-29 | 2021-07-01 | Robert Bosch Gmbh | High-electron-mobility Transistor |
| CN108417626B (zh) * | 2017-02-10 | 2021-07-30 | 台达电子工业股份有限公司 | 半导体装置 |
| JP7155482B2 (ja) * | 2018-09-13 | 2022-10-19 | 住友電工デバイス・イノベーション株式会社 | 半導体装置 |
| EP4481813A1 (en) * | 2023-06-21 | 2024-12-25 | NXP USA, Inc. | Structures for suppressing odd-mode instabilities |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2504503B2 (ja) * | 1988-01-12 | 1996-06-05 | 富士通株式会社 | 半導体素子 |
| JPH05275373A (ja) * | 1992-03-25 | 1993-10-22 | Sanyo Electric Co Ltd | 化合物半導体装置の製造方法 |
| JPH07161659A (ja) * | 1993-12-07 | 1995-06-23 | Nec Corp | 半導体装置およびその製造方法 |
| JPH08316744A (ja) | 1995-05-17 | 1996-11-29 | Oki Electric Ind Co Ltd | 電力増幅回路 |
| US5925901A (en) * | 1997-03-21 | 1999-07-20 | Nec Corporation | Field effect transistor with plated heat sink on a fet chip |
| US6023086A (en) * | 1997-09-02 | 2000-02-08 | Motorola, Inc. | Semiconductor transistor with stabilizing gate electrode |
| JP3515886B2 (ja) | 1997-09-29 | 2004-04-05 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
| JP3169124B2 (ja) * | 1998-06-29 | 2001-05-21 | 日本電気株式会社 | 電界効果トランジスタおよびその製造方法 |
| US6774449B1 (en) * | 1999-09-16 | 2004-08-10 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method for fabricating the same |
-
2011
- 2011-10-26 JP JP2011235436A patent/JP5979530B2/ja active Active
-
2012
- 2012-10-26 US US13/661,471 patent/US9196492B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US9196492B2 (en) | 2015-11-24 |
| JP2013093477A (ja) | 2013-05-16 |
| US20130109168A1 (en) | 2013-05-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5979530B2 (ja) | 半導体装置の製造方法 | |
| US11532736B2 (en) | Semiconductor device | |
| EP1659622B1 (en) | Field effect transistor and method of manufacturing the same | |
| JP6874928B2 (ja) | 半導体装置 | |
| JP2010278280A (ja) | 高周波半導体装置 | |
| US20200294881A1 (en) | Semiconductor device and manufacturing method thereof | |
| JP7215800B2 (ja) | 半導体装置の製造方法および半導体装置 | |
| US8169035B2 (en) | Semiconductor device | |
| JP5487590B2 (ja) | 半導体装置及びその製造方法 | |
| US20250176253A1 (en) | Group iii-v ic with different sheet resistance 2-deg resistors | |
| JP2008182036A (ja) | 半導体装置の製造方法 | |
| CN111223824B (zh) | 半导体装置及其形成方法 | |
| JP2002319593A (ja) | 半導体デバイスおよび電極形成方法 | |
| JP7332130B2 (ja) | 半導体デバイスの製造方法、半導体装置の製造方法、半導体デバイス、及び半導体装置 | |
| JP2014060427A (ja) | 半導体装置及びその製造方法 | |
| JP5550316B2 (ja) | 半導体装置の製造方法および半導体装置 | |
| CN114127931A (zh) | 氮化物基半导体装置及其制造方法 | |
| US20250380482A1 (en) | Semiconductor device and method for manufacturing the same | |
| WO2025204860A1 (ja) | 半導体装置、電気回路および電子機器 | |
| TW202021119A (zh) | 半導體裝置及其形成方法 | |
| JP2024004022A (ja) | 電力増幅器の設計方法、電力増幅器の製造方法、および電子装置の製造方法 | |
| JP5664744B2 (ja) | 化合物半導体装置及びその製造方法 | |
| JP2024545534A (ja) | チップ、チップ製造方法、無線周波数パワーアンプ、及び端末 | |
| JP2018010968A (ja) | 半導体装置 | |
| JP2008311672A (ja) | 電界効果トランジスタ |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20141027 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20141027 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20150908 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20150910 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20151109 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20160628 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20160715 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 5979530 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |