JP5952281B2 - 特定波長の光束を用いて基板を処理する方法および対応する基板 - Google Patents

特定波長の光束を用いて基板を処理する方法および対応する基板 Download PDF

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Publication number
JP5952281B2
JP5952281B2 JP2013527562A JP2013527562A JP5952281B2 JP 5952281 B2 JP5952281 B2 JP 5952281B2 JP 2013527562 A JP2013527562 A JP 2013527562A JP 2013527562 A JP2013527562 A JP 2013527562A JP 5952281 B2 JP5952281 B2 JP 5952281B2
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Prior art keywords
layer
substrate
buried layer
buried
luminous flux
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Expired - Fee Related
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JP2013527562A
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Japanese (ja)
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JP2013541197A (ja
JP2013541197A5 (https=
Inventor
ブリュエル ミシェル
ブリュエル ミシェル
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Soitec SA
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Soitec SA
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/60Impurity distributions or concentrations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H10P34/40Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
    • H10P34/42Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00Cutting or separating of wafers, substrates or parts of devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00Cutting or separating of wafers, substrates or parts of devices
    • H10P54/50Cutting or separating of wafers, substrates or parts of devices by scoring, breaking or cleaving
    • H10P54/52Cutting or separating of wafers, substrates or parts of devices by scoring, breaking or cleaving by cleaving
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • H10P90/1906Preparing SOI wafers
    • H10P90/1914Preparing SOI wafers using bonding
    • H10P90/1916Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/11Separation of active layers from substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/181Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

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  • Recrystallisation Techniques (AREA)
  • Laser Beam Processing (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
JP2013527562A 2010-09-10 2011-09-20 特定波長の光束を用いて基板を処理する方法および対応する基板 Expired - Fee Related JP5952281B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1057211A FR2964788B1 (fr) 2010-09-10 2010-09-10 Procédé de traitement d'un substrat au moyen d'un flux lumineux de longueur d'onde déterminée, et substrat correspondant
PCT/EP2011/065259 WO2012031998A1 (en) 2010-09-10 2011-09-05 Process for treating a substrate using a luminous flux of determined wavelength, and corresponding substrate

Publications (3)

Publication Number Publication Date
JP2013541197A JP2013541197A (ja) 2013-11-07
JP2013541197A5 JP2013541197A5 (https=) 2016-01-07
JP5952281B2 true JP5952281B2 (ja) 2016-07-13

Family

ID=43920828

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013527562A Expired - Fee Related JP5952281B2 (ja) 2010-09-10 2011-09-20 特定波長の光束を用いて基板を処理する方法および対応する基板

Country Status (7)

Country Link
US (2) US9190314B2 (https=)
EP (1) EP2614519B1 (https=)
JP (1) JP5952281B2 (https=)
KR (1) KR101918166B1 (https=)
CN (1) CN103201825A (https=)
FR (1) FR2964788B1 (https=)
WO (1) WO2012031998A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2964788B1 (fr) 2010-09-10 2015-05-15 Soitec Silicon On Insulator Procédé de traitement d'un substrat au moyen d'un flux lumineux de longueur d'onde déterminée, et substrat correspondant
FR2978600B1 (fr) 2011-07-25 2014-02-07 Soitec Silicon On Insulator Procede et dispositif de fabrication de couche de materiau semi-conducteur

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR757986A (fr) 1932-07-04 1934-01-05 Thomson Houston Comp Francaise Perfectionnements aux tubes électroniques et à leurs circuits
US4234356A (en) * 1979-06-01 1980-11-18 Bell Telephone Laboratories, Incorporated Dual wavelength optical annealing of materials
US4456490A (en) * 1983-03-09 1984-06-26 Westinghouse Electric Corp. Laser annealing of MIS devices by back surface laser treatment
JP2008135436A (ja) * 2006-11-27 2008-06-12 Seiko Epson Corp 剥離方法、半導体デバイス及び電子機器
JP5286684B2 (ja) * 2007-03-28 2013-09-11 セイコーエプソン株式会社 薄膜層の剥離方法、薄膜デバイスの転写方法
FR2921752B1 (fr) * 2007-10-01 2009-11-13 Aplinov Procede de chauffage d'une plaque par un flux lumineux.
FR2938116B1 (fr) * 2008-11-04 2011-03-11 Aplinov Procede et dispositif de chauffage d'une couche d'une plaque par amorcage et flux lumineux.
FR2964788B1 (fr) 2010-09-10 2015-05-15 Soitec Silicon On Insulator Procédé de traitement d'un substrat au moyen d'un flux lumineux de longueur d'onde déterminée, et substrat correspondant

Also Published As

Publication number Publication date
KR101918166B1 (ko) 2018-11-13
US20160056247A1 (en) 2016-02-25
US20130154065A1 (en) 2013-06-20
CN103201825A (zh) 2013-07-10
US9190314B2 (en) 2015-11-17
EP2614519B1 (en) 2015-07-01
JP2013541197A (ja) 2013-11-07
US9564496B2 (en) 2017-02-07
FR2964788B1 (fr) 2015-05-15
FR2964788A1 (fr) 2012-03-16
WO2012031998A1 (en) 2012-03-15
KR20140019281A (ko) 2014-02-14
EP2614519A1 (en) 2013-07-17

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