CN1998071A - 制造包含分离层的多层结构的方法 - Google Patents
制造包含分离层的多层结构的方法 Download PDFInfo
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- CN1998071A CN1998071A CNA2005800218458A CN200580021845A CN1998071A CN 1998071 A CN1998071 A CN 1998071A CN A2005800218458 A CNA2005800218458 A CN A2005800218458A CN 200580021845 A CN200580021845 A CN 200580021845A CN 1998071 A CN1998071 A CN 1998071A
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Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Optics & Photonics (AREA)
- Electromagnetism (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Physical Or Chemical Processes And Apparatus (AREA)
Abstract
Description
Claims (29)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0405883 | 2004-06-01 | ||
FR0405883A FR2870988B1 (fr) | 2004-06-01 | 2004-06-01 | Procede de realisation d'une structure multi-couches comportant, en profondeur, une couche de separation |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1998071A true CN1998071A (zh) | 2007-07-11 |
CN100444335C CN100444335C (zh) | 2008-12-17 |
Family
ID=34946629
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2005800218458A Active CN100444335C (zh) | 2004-06-01 | 2005-05-20 | 制造包含分离层的多层结构的方法 |
Country Status (8)
Country | Link |
---|---|
US (1) | US7846816B2 (zh) |
EP (1) | EP1774579B1 (zh) |
JP (1) | JP5335237B2 (zh) |
CN (1) | CN100444335C (zh) |
AU (1) | AU2005256723B8 (zh) |
BR (1) | BRPI0511207A (zh) |
FR (1) | FR2870988B1 (zh) |
WO (1) | WO2006000669A2 (zh) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106340439A (zh) * | 2015-07-06 | 2017-01-18 | 勤友光电股份有限公司 | 用于镭射剥离处理的晶圆结构 |
TWI569364B (zh) * | 2011-09-20 | 2017-02-01 | 梭意泰科公司 | 以剝落作用分離之複合結構之製造方法 |
CN106887384A (zh) * | 2012-03-30 | 2017-06-23 | 帝人株式会社 | 掺杂剂组合物、掺杂剂注入层和掺杂层的形成方法 |
CN108472766A (zh) * | 2016-01-05 | 2018-08-31 | 西尔特克特拉有限责任公司 | 用于在固体中平坦地产生改性部的方法和设备 |
CN108883502A (zh) * | 2016-03-22 | 2018-11-23 | 西尔特克特拉有限责任公司 | 待分裂固体的组合的激光处理 |
CN112204711A (zh) * | 2018-03-29 | 2021-01-08 | Soitec公司 | 通过光束分离可移除复合结构的方法 |
US10978311B2 (en) | 2016-12-12 | 2021-04-13 | Siltectra Gmbh | Method for thinning solid body layers provided with components |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8288684B2 (en) * | 2007-05-03 | 2012-10-16 | Electro Scientific Industries, Inc. | Laser micro-machining system with post-scan lens deflection |
FR2961719B1 (fr) | 2010-06-24 | 2013-09-27 | Soitec Silicon On Insulator | Procede de traitement d'une piece en un materiau compose |
FR2965396B1 (fr) * | 2010-09-29 | 2013-02-22 | S O I Tec Silicon On Insulator Tech | Substrat démontable, procédés de fabrication et de démontage d'un tel substrat |
RU2469433C1 (ru) * | 2011-07-13 | 2012-12-10 | Юрий Георгиевич Шретер | Способ лазерного отделения эпитаксиальной пленки или слоя эпитаксиальной пленки от ростовой подложки эпитаксиальной полупроводниковой структуры (варианты) |
FR2978600B1 (fr) | 2011-07-25 | 2014-02-07 | Soitec Silicon On Insulator | Procede et dispositif de fabrication de couche de materiau semi-conducteur |
FR2991499A1 (fr) * | 2012-05-31 | 2013-12-06 | Commissariat Energie Atomique | Procede et systeme d'obtention d'une tranche semi-conductrice |
TWI631022B (zh) * | 2016-12-26 | 2018-08-01 | 謙華科技股份有限公司 | 熱印頭模組之製造方法 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2506344B2 (fr) * | 1980-02-01 | 1986-07-11 | Commissariat Energie Atomique | Procede de dopage de semi-conducteurs |
US4415373A (en) * | 1981-11-17 | 1983-11-15 | Allied Corporation | Laser process for gettering defects in semiconductor devices |
JP2004140380A (ja) * | 1996-08-27 | 2004-05-13 | Seiko Epson Corp | 薄膜デバイスの転写方法、及びデバイスの製造方法 |
EP1351308B1 (en) * | 1996-08-27 | 2009-04-22 | Seiko Epson Corporation | Exfoliating method and transferring method of thin film device |
JPH1126733A (ja) * | 1997-07-03 | 1999-01-29 | Seiko Epson Corp | 薄膜デバイスの転写方法、薄膜デバイス、薄膜集積回路装置,アクティブマトリクス基板、液晶表示装置および電子機器 |
EP0926709A3 (en) * | 1997-12-26 | 2000-08-30 | Canon Kabushiki Kaisha | Method of manufacturing an SOI structure |
JP3697106B2 (ja) * | 1998-05-15 | 2005-09-21 | キヤノン株式会社 | 半導体基板の作製方法及び半導体薄膜の作製方法 |
JP3911929B2 (ja) * | 1999-10-25 | 2007-05-09 | セイコーエプソン株式会社 | 液晶表示装置の製造方法 |
US6300208B1 (en) * | 2000-02-16 | 2001-10-09 | Ultratech Stepper, Inc. | Methods for annealing an integrated device using a radiant energy absorber layer |
US7211214B2 (en) * | 2000-07-18 | 2007-05-01 | Princeton University | Laser assisted direct imprint lithography |
EP1459366A2 (en) * | 2001-11-30 | 2004-09-22 | Koninklijke Philips Electronics N.V. | Method of forming a doped region in a semiconductor body comprising a step of amorphization by irradiation |
US6555439B1 (en) * | 2001-12-18 | 2003-04-29 | Advanced Micro Devices, Inc. | Partial recrystallization of source/drain region before laser thermal annealing |
US7105425B1 (en) * | 2002-05-16 | 2006-09-12 | Advanced Micro Devices, Inc. | Single electron devices formed by laser thermal annealing |
-
2004
- 2004-06-01 FR FR0405883A patent/FR2870988B1/fr not_active Expired - Fee Related
-
2005
- 2005-05-20 AU AU2005256723A patent/AU2005256723B8/en not_active Ceased
- 2005-05-20 CN CNB2005800218458A patent/CN100444335C/zh active Active
- 2005-05-20 EP EP05773255A patent/EP1774579B1/fr active Active
- 2005-05-20 JP JP2007513998A patent/JP5335237B2/ja active Active
- 2005-05-20 US US11/628,185 patent/US7846816B2/en active Active
- 2005-05-20 BR BRPI0511207-9A patent/BRPI0511207A/pt not_active IP Right Cessation
- 2005-05-20 WO PCT/FR2005/001262 patent/WO2006000669A2/fr active Application Filing
Cited By (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI569364B (zh) * | 2011-09-20 | 2017-02-01 | 梭意泰科公司 | 以剝落作用分離之複合結構之製造方法 |
US9646825B2 (en) | 2011-09-20 | 2017-05-09 | Soitec | Method for fabricating a composite structure to be separated by exfoliation |
CN106887384A (zh) * | 2012-03-30 | 2017-06-23 | 帝人株式会社 | 掺杂剂组合物、掺杂剂注入层和掺杂层的形成方法 |
CN106887384B (zh) * | 2012-03-30 | 2018-12-14 | 帝人株式会社 | 掺杂剂组合物、掺杂剂注入层和掺杂层的形成方法 |
CN106340439A (zh) * | 2015-07-06 | 2017-01-18 | 勤友光电股份有限公司 | 用于镭射剥离处理的晶圆结构 |
CN108472766B (zh) * | 2016-01-05 | 2021-02-09 | 西尔特克特拉有限责任公司 | 用于在固体中平坦地产生改性部的方法和设备 |
CN108472766A (zh) * | 2016-01-05 | 2018-08-31 | 西尔特克特拉有限责任公司 | 用于在固体中平坦地产生改性部的方法和设备 |
KR20180100063A (ko) * | 2016-01-05 | 2018-09-06 | 실텍트라 게엠베하 | 솔리드 스테이트에서 평탄한 개질을 생성하는 방법 및 장치 |
KR102125439B1 (ko) | 2016-01-05 | 2020-06-22 | 실텍트라 게엠베하 | 솔리드 스테이트에서 평탄한 개질을 생성하는 방법 및 장치 |
US11059202B2 (en) | 2016-01-05 | 2021-07-13 | Siltectra Gmbh | Method and device for producing planar modifications in solid bodies |
CN108883502A (zh) * | 2016-03-22 | 2018-11-23 | 西尔特克特拉有限责任公司 | 待分裂固体的组合的激光处理 |
US11130200B2 (en) | 2016-03-22 | 2021-09-28 | Siltectra Gmbh | Combined laser treatment of a solid body to be split |
CN108883502B (zh) * | 2016-03-22 | 2022-04-15 | 西尔特克特拉有限责任公司 | 待分裂固体的组合的激光处理 |
US10978311B2 (en) | 2016-12-12 | 2021-04-13 | Siltectra Gmbh | Method for thinning solid body layers provided with components |
CN112204711A (zh) * | 2018-03-29 | 2021-01-08 | Soitec公司 | 通过光束分离可移除复合结构的方法 |
Also Published As
Publication number | Publication date |
---|---|
WO2006000669A3 (fr) | 2007-01-25 |
WO2006000669A2 (fr) | 2006-01-05 |
AU2005256723B2 (en) | 2011-02-10 |
FR2870988A1 (fr) | 2005-12-02 |
BRPI0511207A (pt) | 2007-11-27 |
AU2005256723B8 (en) | 2011-07-28 |
EP1774579A2 (fr) | 2007-04-18 |
US7846816B2 (en) | 2010-12-07 |
CN100444335C (zh) | 2008-12-17 |
AU2005256723A1 (en) | 2006-01-05 |
JP5335237B2 (ja) | 2013-11-06 |
JP2008501228A (ja) | 2008-01-17 |
EP1774579B1 (fr) | 2012-05-16 |
US20090053877A1 (en) | 2009-02-26 |
FR2870988B1 (fr) | 2006-08-11 |
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Owner name: S.O.J. TEC SILICON ON INSULATOR TECHNOLOGIES Free format text: FORMER OWNER: APPRINOV Effective date: 20110112 Owner name: APPRINOV Free format text: FORMER OWNER: BRUEL MICHEL Effective date: 20110112 |
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Effective date of registration: 20110112 Address after: French Pavilion Patentee after: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES Address before: France Frey Voruwaze Patentee before: Apulinuofu Effective date of registration: 20110112 Address after: France Frey Voruwaze Patentee after: Apulinuofu Address before: France Frey Voruwaze Patentee before: Michelle Bluer |