FR2965396B1 - Substrat démontable, procédés de fabrication et de démontage d'un tel substrat - Google Patents

Substrat démontable, procédés de fabrication et de démontage d'un tel substrat

Info

Publication number
FR2965396B1
FR2965396B1 FR1057852A FR1057852A FR2965396B1 FR 2965396 B1 FR2965396 B1 FR 2965396B1 FR 1057852 A FR1057852 A FR 1057852A FR 1057852 A FR1057852 A FR 1057852A FR 2965396 B1 FR2965396 B1 FR 2965396B1
Authority
FR
France
Prior art keywords
substrate
removable
manufacturing
disassembling
methods
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1057852A
Other languages
English (en)
Other versions
FR2965396A1 (fr
Inventor
Michel Bruel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Priority to FR1057852A priority Critical patent/FR2965396B1/fr
Priority to US13/217,928 priority patent/US8563399B2/en
Publication of FR2965396A1 publication Critical patent/FR2965396A1/fr
Application granted granted Critical
Publication of FR2965396B1 publication Critical patent/FR2965396B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/7806Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Light Receiving Elements (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)

Abstract

L'invention concerne un substrat démontable (1") pour l'industrie électronique, optique et/ou optoélectronique comprenant une couche démontable (2) reposant sur une zone fragilisée enterrée (3'). Ce substrat est remarquable en ce que cette zone fragilisée enterrée (3') est constituée d'un matériau semi-conducteur, plus dense à l'état liquide qu'à l'état solide, et comprenant par endroits des précités d'impuretés naturellement volatiles. L'invention concerne également un procédé de fabrication et de démontage d'un substrat démontable.
FR1057852A 2010-09-29 2010-09-29 Substrat démontable, procédés de fabrication et de démontage d'un tel substrat Active FR2965396B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1057852A FR2965396B1 (fr) 2010-09-29 2010-09-29 Substrat démontable, procédés de fabrication et de démontage d'un tel substrat
US13/217,928 US8563399B2 (en) 2010-09-29 2011-08-25 Detachable substrate and processes for fabricating and detaching such a substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1057852A FR2965396B1 (fr) 2010-09-29 2010-09-29 Substrat démontable, procédés de fabrication et de démontage d'un tel substrat

Publications (2)

Publication Number Publication Date
FR2965396A1 FR2965396A1 (fr) 2012-03-30
FR2965396B1 true FR2965396B1 (fr) 2013-02-22

Family

ID=43447011

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1057852A Active FR2965396B1 (fr) 2010-09-29 2010-09-29 Substrat démontable, procédés de fabrication et de démontage d'un tel substrat

Country Status (2)

Country Link
US (1) US8563399B2 (fr)
FR (1) FR2965396B1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2978600B1 (fr) 2011-07-25 2014-02-07 Soitec Silicon On Insulator Procede et dispositif de fabrication de couche de materiau semi-conducteur
FR2995444B1 (fr) * 2012-09-10 2016-11-25 Soitec Silicon On Insulator Procede de detachement d'une couche

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2771852B1 (fr) 1997-12-02 1999-12-31 Commissariat Energie Atomique Procede de transfert selectif d'une microstructure, formee sur un substrat initial, vers un substrat final
US6387829B1 (en) * 1999-06-18 2002-05-14 Silicon Wafer Technologies, Inc. Separation process for silicon-on-insulator wafer fabrication
FR2823599B1 (fr) 2001-04-13 2004-12-17 Commissariat Energie Atomique Substrat demomtable a tenue mecanique controlee et procede de realisation
FR2834654B1 (fr) 2002-01-16 2004-11-05 Michel Bruel Procede de traitement d'une piece en vue de modifier au moins une de ses proprietes
US6995075B1 (en) 2002-07-12 2006-02-07 Silicon Wafer Technologies Process for forming a fragile layer inside of a single crystalline substrate
FR2860249B1 (fr) * 2003-09-30 2005-12-09 Michel Bruel Procede de fabrication d'une structure en forme de plaque, en particulier en silicium, application de procede, et structure en forme de plaque, en particulier en silicium
FR2870988B1 (fr) * 2004-06-01 2006-08-11 Michel Bruel Procede de realisation d'une structure multi-couches comportant, en profondeur, une couche de separation
FR2912258B1 (fr) * 2007-02-01 2009-05-08 Soitec Silicon On Insulator "procede de fabrication d'un substrat du type silicium sur isolant"

Also Published As

Publication number Publication date
FR2965396A1 (fr) 2012-03-30
US8563399B2 (en) 2013-10-22
US20120074526A1 (en) 2012-03-29

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