JP5943736B2 - 情報処理装置、情報処理装置の制御方法及びプログラム - Google Patents

情報処理装置、情報処理装置の制御方法及びプログラム Download PDF

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Publication number
JP5943736B2
JP5943736B2 JP2012145659A JP2012145659A JP5943736B2 JP 5943736 B2 JP5943736 B2 JP 5943736B2 JP 2012145659 A JP2012145659 A JP 2012145659A JP 2012145659 A JP2012145659 A JP 2012145659A JP 5943736 B2 JP5943736 B2 JP 5943736B2
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Japan
Prior art keywords
information
processing
circuit
address
logic circuit
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JP2012145659A
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English (en)
Japanese (ja)
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JP2014010549A5 (enExample
JP2014010549A (ja
Inventor
広樹 伊藤
広樹 伊藤
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Canon Inc
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Canon Inc
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Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2012145659A priority Critical patent/JP5943736B2/ja
Priority to EP13172103.7A priority patent/EP2680560B1/en
Priority to US13/925,671 priority patent/US9524177B2/en
Priority to CN201310260744.2A priority patent/CN103516945B/zh
Publication of JP2014010549A publication Critical patent/JP2014010549A/ja
Publication of JP2014010549A5 publication Critical patent/JP2014010549A5/ja
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Publication of JP5943736B2 publication Critical patent/JP5943736B2/ja
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G06F9/44505—Configuring for program initiating, e.g. using registry, configuration files
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4406—Loading of operating system
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/00912—Arrangements for controlling a still picture apparatus or components thereof not otherwise provided for
    • H04N1/00938—Software related arrangements, e.g. loading applications
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/00962—Input arrangements for operating instructions or parameters, e.g. updating internal software
    • H04N1/0097—Storage of instructions or parameters, e.g. customised instructions or different parameters for different user IDs
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/32—Circuits or arrangements for control or supervision between transmitter and receiver or between image input and image output device, e.g. between a still-image camera and its memory or between a still-image camera and a printer device
    • H04N1/32561—Circuits or arrangements for control or supervision between transmitter and receiver or between image input and image output device, e.g. between a still-image camera and its memory or between a still-image camera and a printer device using a programmed control device, e.g. a microprocessor
    • H04N1/32571—Details of system components

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • Stored Programmes (AREA)
  • Logic Circuits (AREA)
  • Facsimiles In General (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
JP2012145659A 2012-06-28 2012-06-28 情報処理装置、情報処理装置の制御方法及びプログラム Active JP5943736B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2012145659A JP5943736B2 (ja) 2012-06-28 2012-06-28 情報処理装置、情報処理装置の制御方法及びプログラム
EP13172103.7A EP2680560B1 (en) 2012-06-28 2013-06-14 Information processing apparatus, method for controlling information processing apparatus, and storage medium
US13/925,671 US9524177B2 (en) 2012-06-28 2013-06-24 Information processing apparatus, method for controlling information processing apparatus, and storage medium
CN201310260744.2A CN103516945B (zh) 2012-06-28 2013-06-26 信息处理装置及其控制方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012145659A JP5943736B2 (ja) 2012-06-28 2012-06-28 情報処理装置、情報処理装置の制御方法及びプログラム

Publications (3)

Publication Number Publication Date
JP2014010549A JP2014010549A (ja) 2014-01-20
JP2014010549A5 JP2014010549A5 (enExample) 2016-04-07
JP5943736B2 true JP5943736B2 (ja) 2016-07-05

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JP2012145659A Active JP5943736B2 (ja) 2012-06-28 2012-06-28 情報処理装置、情報処理装置の制御方法及びプログラム

Country Status (4)

Country Link
US (1) US9524177B2 (enExample)
EP (1) EP2680560B1 (enExample)
JP (1) JP5943736B2 (enExample)
CN (1) CN103516945B (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9379713B2 (en) * 2014-01-17 2016-06-28 Semiconductor Energy Laboratory Co., Ltd. Data processing device and driving method thereof
JP6593978B2 (ja) * 2014-06-09 2019-10-23 キヤノン株式会社 印刷装置、その制御方法とプログラム
JP6598432B2 (ja) * 2014-06-24 2019-10-30 キヤノン株式会社 画像処理装置、その制御方法およびプログラム
JP2016042296A (ja) * 2014-08-18 2016-03-31 キヤノン株式会社 画像処理装置、情報処理方法及びプログラム
JP2016111629A (ja) * 2014-12-09 2016-06-20 キヤノン株式会社 画像処理装置、その制御方法およびプログラム
JP2016111633A (ja) * 2014-12-09 2016-06-20 キヤノン株式会社 回路情報に従って論理回路を構成可能な回路を持つデバイスと、複数の制御手段とを有する情報処理システム
TWI561007B (en) 2015-07-22 2016-12-01 Nuvoton Technology Corp Function programmable circuit and operation method thereof
JP2017062537A (ja) * 2015-09-24 2017-03-30 キヤノン株式会社 情報処理装置、情報処理装置の制御方法、及びプログラム
JP6816380B2 (ja) * 2016-04-15 2021-01-20 オムロン株式会社 画像処理装置、画像処理方法、情報処理プログラム、および記録媒体
CN106020864A (zh) * 2016-05-10 2016-10-12 西安电子工程研究所 基于网络和光纤数据传输实现的多板卡fpga程序烧写方法
CN113495762B (zh) * 2020-03-18 2025-01-03 智微科技股份有限公司 片上系统的开机方法
JP7478065B2 (ja) 2020-08-19 2024-05-02 東芝テック株式会社 情報処理装置および情報処理方法
JP2024104133A (ja) * 2023-01-23 2024-08-02 東芝テック株式会社 電子回路

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19654593A1 (de) * 1996-12-20 1998-07-02 Pact Inf Tech Gmbh Umkonfigurierungs-Verfahren für programmierbare Bausteine zur Laufzeit
JP2000089949A (ja) * 1998-09-11 2000-03-31 Hitachi Denshi Ltd プログラム書き込み方法
US7177036B2 (en) * 1999-12-01 2007-02-13 Minolta Co., Ltd. Image processing system for reading and processing images
JP4350954B2 (ja) 2003-01-07 2009-10-28 東芝エレベータ株式会社 エレベータ制御装置
JP2004326180A (ja) 2003-04-21 2004-11-18 Matsushita Electric Ind Co Ltd 集積回路、それを用いた画像入出力装置及び画像入出力方法
GB2423840A (en) * 2005-03-03 2006-09-06 Clearspeed Technology Plc Reconfigurable logic in processors
JP4223037B2 (ja) 2005-12-26 2009-02-12 シャープ株式会社 画像処理装置
US7487344B2 (en) * 2006-03-03 2009-02-03 Alcatel Lucent Implementing a microprocessor boot configuration prom within an FPGA
US7470902B1 (en) * 2006-03-20 2008-12-30 Flir Systems, Inc. Infrared camera electronic architectures
JP2008059066A (ja) * 2006-08-29 2008-03-13 Matsushita Electric Ind Co Ltd コンパイラ装置および半導体集積回路装置
JP5438358B2 (ja) * 2009-04-13 2014-03-12 キヤノン株式会社 データ処理装置及びその制御方法
US20110099423A1 (en) * 2009-10-27 2011-04-28 Chih-Ang Chen Unified Boot Code with Signature

Also Published As

Publication number Publication date
CN103516945A (zh) 2014-01-15
EP2680560B1 (en) 2020-04-08
EP2680560A3 (en) 2014-04-02
JP2014010549A (ja) 2014-01-20
US20140006766A1 (en) 2014-01-02
US9524177B2 (en) 2016-12-20
CN103516945B (zh) 2017-05-17
EP2680560A2 (en) 2014-01-01

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