JP5710529B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
- Publication number
- JP5710529B2 JP5710529B2 JP2012060873A JP2012060873A JP5710529B2 JP 5710529 B2 JP5710529 B2 JP 5710529B2 JP 2012060873 A JP2012060873 A JP 2012060873A JP 2012060873 A JP2012060873 A JP 2012060873A JP 5710529 B2 JP5710529 B2 JP 5710529B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- gas
- tungsten
- silicon
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/02—Pretreatment of the material to be coated
- C23C16/0272—Deposition of sub-layers, e.g. to promote the adhesion of the main coating
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/04—Coating on selected surface areas, e.g. using masks
- C23C16/045—Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
- C23C16/08—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metal halides
- C23C16/14—Deposition of only one other metal element
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
- H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
- H10P14/43—Chemical deposition, e.g. chemical vapour deposition [CVD]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
- H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
- H10P14/43—Chemical deposition, e.g. chemical vapour deposition [CVD]
- H10P14/432—Chemical deposition, e.g. chemical vapour deposition [CVD] using selective deposition
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
- H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
- H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
- H10W20/034—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics bottomless barrier, adhesion or liner layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
- H10W20/041—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being discontinuous
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
- H10W20/042—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
- H10W20/045—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers for deposition from the gaseous phase, e.g. for chemical vapour deposition [CVD]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
Landscapes
- Chemical & Material Sciences (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Engineering & Computer Science (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Chemical Vapour Deposition (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012060873A JP5710529B2 (ja) | 2011-09-22 | 2012-03-16 | 半導体装置及びその製造方法 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011207829 | 2011-09-22 | ||
| JP2011207829 | 2011-09-22 | ||
| JP2012060873A JP5710529B2 (ja) | 2011-09-22 | 2012-03-16 | 半導体装置及びその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2013080891A JP2013080891A (ja) | 2013-05-02 |
| JP2013080891A5 JP2013080891A5 (https=) | 2014-03-20 |
| JP5710529B2 true JP5710529B2 (ja) | 2015-04-30 |
Family
ID=47910379
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012060873A Expired - Fee Related JP5710529B2 (ja) | 2011-09-22 | 2012-03-16 | 半導体装置及びその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8742592B2 (https=) |
| JP (1) | JP5710529B2 (https=) |
Families Citing this family (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12444651B2 (en) | 2009-08-04 | 2025-10-14 | Novellus Systems, Inc. | Tungsten feature fill with nucleation inhibition |
| JP2014192485A (ja) * | 2013-03-28 | 2014-10-06 | Hitachi Kokusai Electric Inc | 半導体装置の製造方法、基板処理方法及び基板処理装置 |
| JP6311547B2 (ja) * | 2013-11-05 | 2018-04-18 | 東京エレクトロン株式会社 | マスク構造体の形成方法、成膜装置及び記憶媒体 |
| TWI672737B (zh) * | 2013-12-27 | 2019-09-21 | Lam Research Corporation | 允許低電阻率鎢特徵物填充之鎢成核程序 |
| US9627498B2 (en) * | 2015-05-20 | 2017-04-18 | Macronix International Co., Ltd. | Contact structure for thin film semiconductor |
| JP6417051B2 (ja) * | 2015-09-29 | 2018-10-31 | 株式会社Kokusai Electric | 半導体装置の製造方法、基板処理装置およびプログラム |
| US9449921B1 (en) * | 2015-12-15 | 2016-09-20 | International Business Machines Corporation | Voidless contact metal structures |
| US10468264B2 (en) * | 2016-07-04 | 2019-11-05 | Samsung Electronics Co., Ltd. | Method of fabricating semiconductor device |
| JP6937604B2 (ja) * | 2017-04-26 | 2021-09-22 | 東京エレクトロン株式会社 | タングステン膜を形成する方法 |
| KR20250073535A (ko) | 2017-08-14 | 2025-05-27 | 램 리써치 코포레이션 | 3차원 수직 nand 워드라인을 위한 금속 충진 프로세스 |
| JP7009615B2 (ja) * | 2018-03-26 | 2022-01-25 | 株式会社Kokusai Electric | 半導体装置の製造方法、基板処理方法、基板処理装置、およびプログラム |
| KR102806630B1 (ko) | 2018-05-03 | 2025-05-12 | 램 리써치 코포레이션 | 3d nand 구조체들에 텅스텐 및 다른 금속들을 증착하는 방법 |
| US10930493B2 (en) * | 2018-10-29 | 2021-02-23 | Applied Materials, Inc. | Linerless continuous amorphous metal films |
| WO2020123987A1 (en) | 2018-12-14 | 2020-06-18 | Lam Research Corporation | Atomic layer deposition on 3d nand structures |
| WO2020210260A1 (en) | 2019-04-11 | 2020-10-15 | Lam Research Corporation | High step coverage tungsten deposition |
| US12237221B2 (en) | 2019-05-22 | 2025-02-25 | Lam Research Corporation | Nucleation-free tungsten deposition |
| WO2021030836A1 (en) | 2019-08-12 | 2021-02-18 | Lam Research Corporation | Tungsten deposition |
| US11469139B2 (en) * | 2019-09-20 | 2022-10-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bottom-up formation of contact plugs |
| US11257755B2 (en) | 2020-06-15 | 2022-02-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Metal loss prevention in conductive structures |
| JP7449790B2 (ja) * | 2020-06-24 | 2024-03-14 | 株式会社アルバック | 金属配線の形成方法及び金属配線の構造体 |
| KR102942498B1 (ko) * | 2020-12-17 | 2026-03-23 | 가부시키가이샤 코쿠사이 엘렉트릭 | 기판 처리 방법, 프로그램, 기판 처리 장치 및 반도체 장치의 제조 방법 |
| JP7647185B2 (ja) * | 2021-03-09 | 2025-03-18 | 東京エレクトロン株式会社 | タングステン膜を成膜する方法、及びシステム |
| WO2022211007A1 (ja) * | 2021-04-02 | 2022-10-06 | 日本製鉄株式会社 | 無方向性電磁鋼板 |
| JP7827389B2 (ja) * | 2021-11-02 | 2026-03-10 | 東京エレクトロン株式会社 | 成膜方法及び成膜装置 |
| JP2024106554A (ja) * | 2023-01-27 | 2024-08-08 | 東京エレクトロン株式会社 | 成膜方法及び成膜装置 |
| JP2024106552A (ja) * | 2023-01-27 | 2024-08-08 | 東京エレクトロン株式会社 | 成膜方法及び成膜装置 |
| JP2024106553A (ja) * | 2023-01-27 | 2024-08-08 | 東京エレクトロン株式会社 | 成膜方法及び成膜装置 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5462895A (en) * | 1991-09-04 | 1995-10-31 | Oki Electric Industry Co., Ltd. | Method of making semiconductor device comprising a titanium nitride film |
| US5700716A (en) * | 1996-02-23 | 1997-12-23 | Micron Technology, Inc. | Method for forming low contact resistance contacts, vias, and plugs with diffusion barriers |
| US5945350A (en) * | 1996-09-13 | 1999-08-31 | Micron Technology, Inc. | Methods for use in formation of titanium nitride interconnects and interconnects formed using same |
| US6099904A (en) * | 1997-12-02 | 2000-08-08 | Applied Materials, Inc. | Low resistivity W using B2 H6 nucleation step |
| KR100272523B1 (ko) * | 1998-01-26 | 2000-12-01 | 김영환 | 반도체소자의배선형성방법 |
| KR100273767B1 (ko) * | 1998-10-28 | 2001-01-15 | 윤종용 | 반도체소자의 텅스텐막 제조방법 및 그에 따라 제조되는 반도체소자 |
| KR100783844B1 (ko) | 2001-08-14 | 2007-12-10 | 동경 엘렉트론 주식회사 | 텅스텐막의 형성 방법 |
| US7067416B2 (en) * | 2001-08-29 | 2006-06-27 | Micron Technology, Inc. | Method of forming a conductive contact |
| JP3759525B2 (ja) | 2003-10-27 | 2006-03-29 | 松下電器産業株式会社 | 半導体装置の製造方法 |
| JP2009024252A (ja) * | 2007-05-15 | 2009-02-05 | Applied Materials Inc | タングステン材料の原子層堆積法 |
| JP5547380B2 (ja) | 2008-04-30 | 2014-07-09 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
-
2012
- 2012-03-16 JP JP2012060873A patent/JP5710529B2/ja not_active Expired - Fee Related
- 2012-03-20 US US13/424,791 patent/US8742592B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US8742592B2 (en) | 2014-06-03 |
| US20130075912A1 (en) | 2013-03-28 |
| JP2013080891A (ja) | 2013-05-02 |
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