JP5633139B2 - Information equipment - Google Patents

Description

  The present invention relates to information equipment.

  Some so-called small information devices such as printers are of a type that operates by direct current power supplied from an externally connected power supply device. And in recent years, in order to reduce power consumption, even if the power switch is on, the information device is not used for a long time and the main function is not provided. It is required to cut off the supply of DC power to the internal circuit including the part, that is, the part where the power consumption is relatively large. Furthermore, the EuP Directive (Directive on Eco-Design of Energy Using Products), which requires environmentally conscious design for products that use energy, provides any function in off mode, that is, although the equipment is connected to commercial power. It is required to suppress the power consumption in an operating state that is not 0.5 (W) or less.

  For information devices equipped with an off mode, as a power supply cut-off circuit for cutting off the supply of DC power to the internal circuit, a switch circuit for cutting off the supply of DC power to the internal circuit, or this switch circuit is opened. A latch circuit for holding the state is provided. The information device also includes a smoothing capacitor for stabilizing the power supply voltage and a discharge circuit including a discharge resistor for discharging the residual charge of the smoothing capacitor as necessary. Note that a relatively large capacitor is used as the smoothing capacitor.

  In such an information device, when the supply of DC power to the internal circuit is interrupted, for example, a latch start signal is input from the CPU to the latch circuit, and the latch circuit latches the latch start signal. The latch circuit outputs to the switch circuit a switch control signal that should keep the switch circuit open while the latch start signal is latched. The switch circuit maintains an open state while the switch control signal is input, that is, the period when the latch circuit latches the latch start signal, and cuts off the supply of DC power to the internal circuit. In order to resume the supply of DC power to the internal circuit from this state, it is necessary to switch the power switch of the information device to the OFF state and then return it to the ON state. This is as follows.

  That is, when the switch circuit is in the open state and the DC power supply to the internal circuit is interrupted, when the power switch of the information device is switched to the OFF state, the discharge circuit operates to The residual charge of is discharged. Thereafter, when the voltage between the two terminals of the smoothing capacitor drops below the operating voltage of the latch circuit due to the discharge of the residual charge, the latch of the latch start signal in the latch circuit is released (latch release). By releasing the latch, when the switch circuit is closed and the power switch is turned on again, DC power is supplied to the internal circuit including the CPU.

JP 2006-166561 A JP 2005-312162 A

  By the way, as described above, the user of the information device may perform an operation of returning the power switch to the on state immediately after switching the power switch to the off state in order to resume the supply of the DC power to the internal circuit. In this case, the residual charge of the smoothing capacitor may not be sufficiently discharged, and the latch circuit may not be unlatched. In this case, even if the power switch is switched to the ON state, the switch circuit remains in the open state, so that DC power cannot be supplied to the internal circuit, and the internal circuit cannot operate. In order to eliminate such problems, the time required for latch release (latch release time) is shortened by using a resistor with a resistance value as small as possible and a maximum allowable loss as a discharge resistor provided in the discharge circuit. It is possible to do.

  However, since a resistor having the above-described characteristics generally has a relatively large external dimension, use of such a resistor as a discharge resistor leads to an increase in size of information equipment. For this reason, the resistor which has the characteristic mentioned above is not suitable for mounting to information equipment.

  The present invention has been made to solve the above-described problem. When the supply of DC power to the internal circuit including the CPU is interrupted, the latch circuit is released to release the DC power to the internal circuit. An object of the present invention is to achieve both the downsizing of the information device and the shortening of the latch release time in the information device in which the supply of information is resumed.

SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.
[Form 1]
An information device having a first operation mode in which DC power is supplied from a power supply device and a second operation mode in which supply of the DC power from the power supply device is interrupted,
A controller that operates with the DC power and outputs a latch start signal;
The input terminal connected to the power supply apparatus, the output terminal, and the first attitude in which the connection state between the input terminal and the output terminal is turned on and the second attitude in which the connection state is turned off. A power switch having an operation unit;
A smoothing capacitor having a first terminal connected to the output terminal of the power switch and a second terminal grounded;
A switch circuit connected between the output terminal of the power switch and the control unit, and for switching between supply and interruption of the DC power to the control unit;
A switch control signal that includes a latch circuit that latches the latch start signal input from the control unit, and that blocks supply of the DC power to the control unit based on a latch state of the latch start signal in the latch circuit And a switch control signal generation circuit that outputs the switch control signal to the switch circuit;
Latch release for detecting the connection state in the power switch and outputting a latch release signal for releasing the latch of the latch start signal in the latch circuit to the switch control signal generation circuit when the connection state is an off state A signal generation unit,
The latch circuit and the latch release signal generation unit are configured to be operable by the DC power supplied from the output terminal of the power switch or the smoothing capacitor.
The control unit outputs the latch start signal to the switch control signal generation circuit when shifting from the first operation mode to the second operation mode,
When the latch release signal is input to the latch circuit, the latch circuit releases the latch of the latch start signal,
The information device, wherein the switch circuit is opened when the switch control signal is input, and is closed when the switch control signal is not input.

[Application Example 1]
A first operation mode in which dc power is supplied from the power supply device, an information device and a second operation mode in which the supply of the DC power from the power supply is cut off,
A controller that operates with the DC power and outputs a latch start signal;
The input terminal connected to the power supply apparatus , the output terminal , and the first attitude in which the connection state between the input terminal and the output terminal is turned on and the second attitude in which the connection state is turned off. a power switch having an operation unit,
A smoothing capacitor which have a first terminal and a second terminal that is grounded is connected to the output terminal of said power switch,
Connected to said output terminal of said power switch, and Luz switch circuit switches between cutoff and supplying the DC power to the control unit,
Switch to cut off the supply of the DC power to the front Symbol controller based on the latched state of said has a latch circuit that latches the latch start signal input from the control unit, said latch start signal before SL latch circuit A switch control signal generation circuit that generates a control signal and outputs the switch control signal to the switch circuit;
Detects the connection state in the power switch when the connection state is OFF, the latch outputting a latch release signal unlatch the latch start signal in the latch circuit to said switch control signal generating circuit A release signal generation unit,
The latch circuits Contact good beauty before SL latch release signal generator, the output end frames other the power switch is operatively configured by the DC power supplied from the pre-Symbol smoothing capacitor,
Wherein, when the transition from the previous SL first mode of operation to the second operation mode, and outputs the latch start signal to the switch control signal generating circuit,
When the latch release signal is input to the latch circuit, the latch circuit releases the latch of the latch start signal,
The switch circuit information device, wherein the open state will, be a closed state when the front Symbol switch control signal is not input when the switch control signal is input.

  Here, the input terminal of the power switch and the power supply device, the output terminal of the power switch and the first terminal of the smoothing capacitor, and the output terminal of the power switch and the switch circuit do not necessarily have to be directly connected. Other circuit elements such as resistors may be connected.

  In the information device of Application Example 1, when the operation mode is the second operation mode and the switch circuit is in the open state, the posture of the operation unit of the power switch is switched from the first posture to the second posture. When the connection state between the input terminal and the output terminal is turned off, the latch release signal generation unit detects that the power switch has been turned off, and has the latch release signal as a latch circuit. Output to the switch control signal generation circuit. The latch circuit releases the latch when the latch release signal is input. For this reason, the latch circuit can release the latch even if the residual charge of the smoothing capacitor is not sufficiently discharged and the voltage between both terminals of the smoothing capacitor does not drop below the operating voltage of the latch circuit. it can. Therefore, in the information device of this application example, in order to shorten the latch release time, it is not necessary to use the resistor having the small resistance value and the large allowable loss described above as the discharge resistance. That is, according to this application example, both downsizing of the information device and shortening of the latch release time can be achieved.

  In the present specification, “the connection state between the input terminal and the output terminal of the power switch is in the on state” (also simply referred to as “the power switch is in the on state”) is at least the operation section of the power switch. Means that the first posture is the first posture. Also, “the connection state between the input terminal and the output terminal of the power switch is in the off state” (also simply referred to as “the power switch is in the off state”) means that at least the attitude of the operation part of the power switch is the second. It means that the attitude.

[Application Example 2]
As before SL latch release signal generation unit detects a potential difference between said input terminal of said power switch and said output terminal, when the potential difference is equal to or greater than a predetermined value, the connection state is off state, The information apparatus according to Application Example 1, further including a potential difference detection circuit that outputs the latch release signal to the switch control signal generation circuit.

  When the operation mode is the second operation mode and the switch circuit is in the open state, the attitude of the operation part of the power switch is switched from the first attitude to the second attitude, and the input terminal, the output terminal, When the connection state of the smoothing capacitor is turned off, the residual charge of the smoothing capacitor is discharged by the current consumption of the circuit elements connected directly or indirectly to the smoothing capacitor, and the voltage between both terminals of the smoothing capacitor decreases. A potential difference is generated between the input terminal and the output terminal of the power switch. In the information device of Application Example 2, the potential difference detection circuit detects the potential difference between the input terminal and the output terminal of the power switch, and when the potential difference becomes a predetermined value or more, the power switch is switched to the off state. For example, the latch release signal can be output to a switch control signal generation circuit having a latch circuit.

[Application Example 3]
Between the first terminal of the pre-Symbol smoothing capacitor and said latch circuit comprises a resistor vessels that Ru to discharge the residual charge of the smoothing capacitor,
Wherein the resistance value of the resistor, the information apparatus according to Application Example 2 that will be set based on the power consumption and the discharge time when discharging of the residual charge.

  When the resistance value of the resistor is set to a relatively high value, even when the operation mode is the second operation mode, the current consumption by the resistor becomes relatively small. On the other hand, since the voltage drop between both terminals of the smoothing capacitor is relatively slow when the power switch is switched to the OFF state, there is a potential difference greater than the predetermined value between the input terminal and the output terminal of the power switch. It takes a relatively long time for the potential difference detection circuit to output the latch release signal. On the other hand, when the resistance value of the resistor is set to a relatively low value, only when the operation mode is the second operation mode, a current is allowed to flow through the resistor, and the power switch is turned off. In this case, the discharge time of the residual charge of the smoothing capacitor can be made relatively short. The first operation mode is not affected. On the other hand, current consumption by the resistor increases when the operation mode is the second operation mode.

  In the information device of Application Example 3, the resistance value of the resistor is set in consideration of the power consumption and the discharge time when the residual charge of the smoothing capacitor is discharged, thereby latching when the operation mode is the second mode. The holding current of the circuit, that is, the current flowing through the resistor is set appropriately, and when the power switch is switched to the OFF state, the potential difference detection time, that is, between the input terminal and the output terminal of the power switch. The time until the potential difference equal to or greater than the predetermined value is appropriately set.

  The resistance value of the resistor is set so that, for example, the operation mode is the second operation mode, and the holding current of the latch circuit becomes the upper limit value of the current value allowed in the second operation mode. Thus, when the power switch is switched to the OFF state, the time until the potential difference between the input terminal and the output terminal of the power switch becomes a predetermined value or more can be shortened. Note that the current value allowed in the second operation mode is preferably as low as possible from the viewpoint of low power consumption. However, from the viewpoint of the product function, it may be desired to shorten the potential difference detection time. Further, the upper limit value is defined by certain laws and regulations and product specifications.

[Application Example 4]
Before SL controller, prior SL period is the first operation mode, and outputs a latch release prohibition signal to the switch control signal generating circuit, when moving from front Symbol first mode of operation to the second operation mode To stop the output of the latch release prohibiting signal,
Said switch control signal generating circuit, before Symbol period unlatch prohibiting signal is input, an application example 2 or 3, wherein the information device includes a latch release prohibition circuit for prohibiting the input of said latch release signal to the latch circuit .

  When the operation mode is the first operation mode, the potential difference between the input terminal and the output terminal of the power switch is, for example, sulfidation of a contact member or adhesion of siloxane in the power switch even when the power switch is on. Due to the deterioration of the contacts, the contact resistance may increase, resulting in a predetermined value or more. Even in such a case, the potential difference detection circuit outputs a latch release signal as in the case where the power switch is in the OFF state. For this reason, the switch control signal generation circuit may malfunction due to an input of an unlatched signal that is not desired. In the information device of Application Example 4, the switch control signal generation circuit includes the latch release prohibiting circuit, so that it is possible to prevent malfunction due to an input of an unlatched latch release signal.

[Application Example 5]
Before SL switch control signal generating circuit, the previous SL said latch release signal that the period between your good beauty before Symbol unlatch prohibition circuit state signal is input indicating that latches the latch start signal from the latch circuit period is input, generates the switch control signal you cut off the supply of the DC power to the control unit,
The period during which the state signal and said latch release signal indicating that the latch start signal has been latched is not input, the DC power supply wherein the do not want to generate a switch control signal you cut off the O to the control unit With R circuit,
The information apparatus according to Application Example 4 , wherein a signal output from the OR circuit is output as the switch control signal.

  In the information device of Application Example 4 described above, when the operation mode is the second operation mode, when the power switch is switched to the off state, the latch circuit is unlatched by the latch release signal. The switch circuit is closed. For this reason, even if the power switch is in the OFF state, a current flows from the smoothing capacitor to the control unit, and the control unit may malfunction. On the other hand, in the information equipment of Application Example 5, since the switch control signal generation circuit includes the OR circuit, when the operation mode is the second operation mode, when the power switch is switched to the off state, In the switch control signal generation circuit, a switch control signal that should cut off the supply of DC power to the control unit is generated, and the switch circuit can be held in the open state. Therefore, the malfunction of the control unit described above can be prevented.

[Application Example 6]
Before SL control unit includes an error detection unit for detecting an error,
The information device according to any one of Application Examples 1 to 5, wherein the error detection unit outputs the latch start signal to the switch control signal generation circuit when the error is detected.

  In the information device of Application Example 6, when a predetermined error is detected by the error detection unit, the switch control signal generation circuit causes the latch circuit to latch the latch start signal, thereby supplying DC power to the control unit. A switch control signal to be cut off is generated. Therefore, when a predetermined error is detected by the error detection unit, the switch circuit can be opened to cut off the supply of DC power to the control unit. As a result, when a failure occurs in the control unit, it is possible to prevent the failure from expanding. Note that examples of the predetermined error detected by the error detection unit include errors that may be recovered by power-on again, such as an overvoltage error, a low voltage error, and a short circuit error.

[Application Example 7]
Before SL information equipment, information equipment according to any one of application examples 1 to 6 are printers.

  Since the printer is a relatively small information device, this application example is suitable.

  The present invention can be configured as an invention of a method for controlling an information device in addition to the above-described configuration as an information device.

It is explanatory drawing which shows schematic structure of the computer system 100 containing the information equipment as 1st Example of this invention. It is explanatory drawing which shows schematic structure of the electric power supply interruption | blocking circuit with which the printer 10 of 1st Example is provided. 3 is a timing chart illustrating an operation of a power supply cutoff circuit in the printer 10 of the first embodiment. It is explanatory drawing which shows schematic structure of the power supply interruption | blocking circuit with which the conventional printer is provided. It is a timing chart which shows operation | movement of the power supply interruption | blocking circuit in the conventional printer. It is explanatory drawing which shows schematic structure of the electric power supply interruption | blocking circuit with which the printer of 2nd Example is provided. It is a timing chart which shows operation | movement of the electric power supply interruption | blocking circuit in the printer of 2nd Example. It is explanatory drawing which shows schematic structure of the electric power supply interruption | blocking circuit with which the printer of 3rd Example is provided. It is a timing chart which shows operation | movement of the electric power supply interruption | blocking circuit in the printer of 3rd Example. It is explanatory drawing which shows schematic structure of the electric power supply interruption | blocking circuit in the printer of a modification.

Hereinafter, embodiments of the present invention will be described based on examples.
A. First embodiment:
A1. System configuration:
FIG. 1 is an explanatory diagram showing a schematic configuration of a computer system 100 including an information device as a first embodiment of the present invention. The computer system 100 includes a personal computer PC and a printer 10 as an information device of the present invention.

  An AC adapter 20 is connected to the printer 10 via a power cable 22. The AC adapter 20 is connected to a commercial power supply via a power cable 24. The AC adapter 20 converts AC power supplied from a commercial power source into DC power, and supplies this DC power to the printer 10. The AC adapter 20 corresponds to the power supply device in [Means for Solving the Problems].

  A personal computer PC is also connected to the printer 10 via a printer cable 30. A keyboard KB, a mouse MS, and a display DP are connected to the personal computer PC. The printer 10 executes printing when a print job is input from the personal computer PC.

  In order to suppress power consumption, the printer 10 according to the present embodiment includes, as an operation mode, a power supply mode that is a normal operation mode for supplying DC power supplied from the AC adapter 20 to an internal circuit including a CPU, an internal mode A power cutoff mode (off mode) in which the supply of DC power to the circuit is cut off. When no print job is input from the personal computer PC to the printer 10 for a long time, the operation mode is switched from the power supply mode to the power cut-off mode. The time until the operation mode is switched from the power supply mode to the power cutoff mode can be arbitrarily set by the user of the printer 10. The supply of DC power to the internal circuit when the operation mode is switched from the power supply mode to the power cutoff mode is performed by the power supply cutoff circuit. The power supply cutoff circuit will be described in detail later. The power supply mode includes the normal mode, which is an operation mode with relatively high power consumption at the time of printing, and the relatively power consumption when waiting for the input of a print job after a predetermined time has elapsed since the execution of printing. And a power saving mode in which the operation mode is low.

A2. Configuration of power supply cutoff circuit:
FIG. 2 is an explanatory diagram illustrating a schematic configuration of a power supply cutoff circuit included in the printer 10 of the first embodiment. As illustrated, the power supply cutoff circuit includes a tact switch 12, a smoothing capacitor 13, a resistor 13R, a switch circuit 14, a switch control signal generation circuit 15, and a potential difference detection circuit 16. The switch control signal generation circuit 15 includes a latch circuit 15a. The latch circuit 15a is grounded.

  The tact switch 12 includes an input terminal 12a, an output terminal 12b, and an operation unit 12c. The tact switch 12 is configured such that the attitude of the operation unit 12c is a first attitude in which a connection state between the input terminal 12a and the output terminal 12b (hereinafter also simply referred to as a connection state) is turned on, and a connection state is turned off. This is a power switch for switching the connection state by a switching operation for switching between the second posture. The tact switch 12 maintains the attitude and connection state of the operation unit 12c unless a switching operation is performed. The input terminal 12 a is connected to the AC adapter 20.

  The smoothing capacitor 13 has a first terminal 13a and a second terminal 13b. The first terminal 13a is connected to the output terminal 12b of the tact switch 12, and the second terminal 13b is grounded. The smoothing capacitor 13 is a capacitor for stabilizing the voltage Vin2. As the smoothing capacitor 13, a capacitor having a relatively large capacity is used.

  The resistor 13R is connected between the first terminal 13a of the smoothing capacitor 13 and the latch circuit 15a. The resistor 13R is used to discharge the residual charge of the smoothing capacitor 13 via the latch circuit 15a when the tact switch 12 is switched to the off state. The resistance value of the resistor 13R is set in consideration of the power consumption and the discharge time when the residual charge of the smoothing capacitor 13 is discharged. In this embodiment, the resistance value of the resistor 13R is set so that the discharge time is the shortest within the range where the power consumption during the discharge is 0.5 (W) or less (the upper limit value of the EuP command). ing.

  The switch circuit 14 is connected to the output terminal 12 b of the tact switch 12. Based on the switch control signal VSC input from the switch control signal generation circuit 15, the switch circuit 14 switches between supply and interruption of DC power to the CPU 17 and the internal circuit including the error detection circuit 18. The switch circuit 14 is in an open state when a switch control signal VSC that should cut off the supply of DC power to the internal circuit is input. The switch circuit 14 is closed when the switch control signal VSC that should cut off the supply of DC power to the internal circuit is not input. The DC power that has passed through the switch circuit 14 is converted into a voltage (voltage Vcc) by a DC / DC converter (not shown) and supplied to the CPU 17 and the error detection circuit 18. The switch circuit 14 includes a field effect transistor (FET).

  The switch control signal generation circuit 15 generates a switch control signal VSC based on the latch start signal VLT input from the CPU 17 or the error detection circuit 18 and the latch release signal VRST input from the potential difference detection circuit 16. The switch control signal VSC is output to the switch circuit 14. In this embodiment, the switch control signal generation circuit 15 supplies DC power to the internal circuit during a period when the latch start signal VLT is input to the latch circuit 15a and the latch start signal VLT is latched by the latch circuit 15a. A switch control signal VSC to be cut off is generated. The latch circuit 15a releases the latch when the latch release signal VRST is input. The switch control signal generation circuit 15 does not generate the switch control signal VSC that should cut off the supply of DC power to the internal circuit while the latch start signal VLT is not latched in the latch circuit 15a. Note that the latch circuit 15a is operated by the voltage Vin2 after the tact switch 12 input from the AC adapter 20.

  The potential difference detection circuit 16 detects a potential difference (Vin1-Vin2) between the input terminal 12a and the output terminal 12b of the tact switch 12, and the potential difference between both terminals is equal to or greater than a predetermined value (for example, 1 (V) or more). In some cases, the latch release signal VRST is output to the switch control signal generation circuit 15. That is, the potential difference detection circuit 16 outputs the latch release signal VRST when, for example, the potential difference between the input terminal 12a and the output terminal 12b of the tact switch 12 is a predetermined value or more, and the tact switch 12 is in an off state. .

  The CPU 17 outputs a latch start signal VLT to the potential difference detection circuit 16 when the operation mode shifts from the power supply mode to the power cutoff mode. The error detection circuit 18 detects a predetermined error inside the printer 10 when the operation mode of the printer 10 is the power supply mode. When this error is detected, the error detection circuit 18 sends a latch start signal to the switch control signal generation circuit 15. Output VLT. Examples of errors detected by the error detection circuit 18 include an overvoltage error, a low voltage error, and a short circuit error. The CPU 17 and the error detection circuit 18 correspond to the control unit in [Means for Solving the Problems].

A3. Operation of power supply cutoff circuit:
FIG. 3 is a timing chart showing the operation of the power supply cutoff circuit in the printer 10 of the first embodiment.

  At time t0 when the tact switch 12 is off, the attitude of the operation unit 12c of the tact switch 12 is switched from the second attitude to the first attitude. When the tact switch 12 is turned on, the voltage Vin2 rises and the printer The ten operation modes are power supply modes.

  Thereafter, the CPU 17 refers to the timer and, when a predetermined time has passed without a print job being input from the personal computer PC, at time t1, in order to shift the operation mode of the printer 10 from the power supply mode to the power cutoff mode. A latch start signal VLT is output. When the latch circuit 15a latches the latch start signal VLT (latch state: latch valid), the switch control signal generation circuit 15 outputs to the switch circuit 14 a switch control signal VSC that should cut off the supply of DC power to the internal circuit. To do. When the switch control signal VSC is input to the switch circuit 14, the switch circuit 14 is opened. After the switch circuit 14 is opened and the supply of DC power to the internal circuit is cut off, the operation mode of the printer 10 is changed until the tact switch 12 is switched off and then switched on again. It remains in the power cut-off mode.

  In order to return the operation mode of the printer 10 from the power cut-off mode to the power supply mode, the posture of the operation unit 12c of the tact switch 12 is switched from the first posture to the second posture at time t3. In the off state, the residual charge of the smoothing capacitor 13 is discharged through the resistor 13R, the latch circuit 15a, and the like, so that the voltage (voltage Vin2) between both terminals of the smoothing capacitor 13 decreases. For this reason, a potential difference is generated between the input terminal 12 a and the output terminal 12 b of the tact switch 12. The potential difference detection circuit 16 detects that the potential difference between the input terminal 12 a and the output terminal 12 b of the tact switch 12 has become a predetermined value or more, and outputs a latch release signal VRST to the switch control signal generation circuit 15. When the latch release signal VRST is input to the latch circuit 15a and released (latch state: invalid), the switch control signal generation circuit 15 switches the switch control signal VSC to cut off the supply of DC power to the internal circuit. Stop the output of. The switch circuit 14 is closed when the input of the switch control signal VSC that should cut off the supply of DC power to the internal circuit is stopped.

  At time t4, when the attitude of the operation unit 12c of the tact switch 12 is switched from the second attitude to the first attitude and the tact switch 12 is turned on, the operation mode of the printer 10 returns to the power supply mode. To do. In the present embodiment, the time interval from time t3 to time t4 described above is, for example, about 0.5 seconds, and the switching time of the operation unit 12c in the tact switch 12 is a relatively short time. Therefore, in the period from time t3 to time t4, the residual charge of the smoothing capacitor 13 is discharged through the resistor 13R, the latch circuit 15a, etc., but at time t4, the voltage Vin2 is the operating voltage of the latch circuit 15a. It will not drop below.

  As described above, when the operation mode of the printer 10 is the power supply mode, the error detection circuit 18 detects a predetermined error in the printer 10 and performs switch control when the error is detected. A latch start signal VLT is output to the signal generation circuit 15. In this case, although not shown, the power supply cutoff circuit operates in the same manner as when the latch start signal VLT is output from the CPU 17 at time t1, and the operation mode of the printer 10 is changed from the power supply mode. Switch to power cut-off mode.

A4. effect:
Here, in order to show the effect of including the power supply cutoff circuit having the above-described configuration in the printer 10 of the first embodiment, the power supply in the conventional printer having the power supply mode and the power cutoff mode as operation modes. The interruption circuit will be described.

  FIG. 4 is an explanatory diagram showing a schematic configuration of a power supply cutoff circuit provided in a conventional printer. As can be seen from the comparison between FIG. 4 and FIG. 2, this power supply cutoff circuit includes a discharge circuit having a discharge resistor R and a switch circuit SW, does not include the potential difference detection circuit 16, and an error detection circuit. 18 is different from the power supply cutoff circuit provided in the printer 10 of the first embodiment. The discharge circuit is a circuit that operates when the tact switch 12 is switched from the on state to the off state, and discharges the residual charge of the smoothing capacitor 13.

  FIG. 5 is a timing chart showing the operation of the power supply cutoff circuit in the conventional printer. The operation from time t0 to time t3 is the same as the operation of the power supply cutoff circuit in the printer 10 of the first embodiment (see FIG. 3).

  In the power supply cutoff circuit in the conventional printer, when the tact switch 12 is turned off at time t3, the discharge circuit operates to discharge the residual charge of the smoothing capacitor 13. Thereafter, when the voltage (voltage Vin2) between both terminals of the smoothing capacitor 13 drops below the operating voltage of the latch circuit 15Ra at time t5, the latch of the latch circuit 15Ra is released (latch state: invalid). By releasing the latch, the switch circuit 14 is closed. At time t6, when the tact switch 12 is switched to the ON state again, DC power is supplied to the internal circuit.

  That is, in the power supply cutoff circuit in the conventional printer, the latch circuit 15Ra is not unlatched and the switch circuit 14 remains open until the voltage between both terminals of the smoothing capacitor 13 becomes less than the operating voltage of the latch circuit 15Ra. It is. Accordingly, even when the tact switch 12 is turned on at time t4 before the voltage between both terminals of the smoothing capacitor 13 drops below the operating voltage of the latch circuit 15Ra, the switch circuit 14 remains open. The DC power cannot be supplied to the internal circuit.

  In order to solve such a problem, it is possible to shorten the latch release time of the latch circuit 15Ra by using a resistor having a resistance value as small as possible and a power dissipation as large as possible as the discharge resistor R included in the discharge circuit. Conceivable. However, since a resistor having such characteristics generally has a relatively large external dimension, using such a resistor as the discharge resistor R leads to an increase in the size of the printer. For this reason, the resistor having the above-described characteristics is not suitable for mounting on a printer.

  On the other hand, in the printer 10 of the first embodiment, since the power supply cutoff circuit includes the potential difference detection circuit 16, it is output from the potential difference detection circuit 16 without discharging the residual charge of the smoothing capacitor 13. The latch release of the latch circuit 15a can be performed by the latch release signal VRST. Therefore, in the printer 10 of the first embodiment, it is not necessary to use the resistor having a small resistance value and a large allowable loss described above as the discharge resistance R in order to shorten the latch release time. That is, the printer 10 according to the first embodiment can achieve both the size reduction of the printer 10 and the shortening of the latch release time.

  In the printer 10 of the first embodiment, when the error detection circuit 18 detects a predetermined error, the latch start signal VLT can be output to cut off the supply of DC power to the internal circuit. When a failure occurs in the internal circuit, the expansion of the failure can be prevented.

  Further, in the printer 10 of the first embodiment, the resistance value of the resistor 13R in the power supply cutoff circuit is set in consideration of the power consumption and the discharge time when the residual charge of the smoothing capacitor 13 is discharged. When the mode is the power cut-off mode, the holding current of the latch circuit 15a, that is, the current flowing through the resistor 13R is appropriately set, and when the tact switch 12 is switched to the OFF state, the potential difference detection time, that is, The time until the potential difference of the predetermined value or more is generated between the input terminal 12a and the output terminal 12b of the tact switch 12 can be appropriately set.

B. Second embodiment:
Similar to the printer 10 of the first embodiment, the printer of the second embodiment has a power supply mode and a power cut-off mode as operation modes. However, the printer of the second embodiment is different from the printer 10 of the first embodiment in the configuration of the power supply cutoff circuit. Hereinafter, the configuration and operation of the power supply cutoff circuit in the printer of the second embodiment will be described.

B1. Configuration of power supply cutoff circuit:
FIG. 6 is an explanatory diagram illustrating a schematic configuration of a power supply cutoff circuit included in the printer of the second embodiment. As can be seen from the comparison between FIG. 6 and FIG. 2, in the printer of the second embodiment, the power supply cutoff circuit includes a switch control signal generation circuit 15A instead of the switch control signal generation circuit 15 in the first embodiment. ing. The switch control signal generation circuit 15A includes a latch release prohibiting circuit 15b in addition to the latch circuit 15a. Further, the CPU 17 outputs a latch release prohibiting signal VPR to the latch release prohibiting circuit 15b while the operation mode of the printer 10 is the power supply mode, and latches when the operation mode shifts from the power supply mode to the power shut-off mode. The output of the release inhibition signal VPR is stopped (see FIG. 7). The latch release prohibiting circuit 15b prohibits the output of the latch release signal VRST output from the potential difference detection circuit 16 to the latch circuit 15a while the latch release prohibiting signal VPR is input. Except for the configuration described above, the second embodiment is the same as the first embodiment.

B2. Operation of power supply cutoff circuit:
FIG. 7 is a timing chart showing the operation of the power supply cutoff circuit in the printer of the second embodiment. The operation of the power supply cutoff circuit in the second embodiment is almost the same as that in the first embodiment. However, since the power supply cutoff circuit in the second embodiment includes the latch release prohibiting circuit 15b, the latch release signal VRST output from the potential difference detection circuit 16 is input to the latch circuit 15a while the operation mode is the power supply mode. It will never be done.

  When the operation mode is the power supply mode, the potential difference between the input terminal 12a and the output terminal 12b of the tact switch 12 may be, for example, sulfidation of contact members in the tact switch 12, even if the tact switch 12 is in an ON state. Due to contact deterioration such as adhesion of siloxane and the like, the contact resistance may increase, so that it may become a predetermined value or more as surrounded by a one-dot chain line in FIG. Even in such a case, the potential difference detection circuit 16 outputs the latch release signal VRST as in the case where the tact switch 12 is in the OFF state (see the latch release signal VRST in FIG. 7). For this reason, when the latch release prohibiting circuit 15b is not provided like the switch control signal generating circuit 15 in the first embodiment, the switch control signal generating circuit 15A malfunctions due to an undesired input of the latch release signal VRST. It can happen. On the other hand, in the printer of the second embodiment, the switch control signal generation circuit 15A in the power supply cut-off circuit includes the latch release prohibiting circuit 15b, thereby preventing an erroneous operation due to an input of an unlatched latch release signal.

  Even in the printer of the second embodiment described above, similarly to the printer 10 of the first embodiment, the latch of the latch circuit 15a is latched by the latch release signal VRST output from the potential difference detection circuit 16 without using the discharge resistor R. Since the release can be performed, both the downsizing of the printer and the shortening of the latch release time can be achieved.

C. Third embodiment:
Similar to the printer of the second embodiment, the printer of the third embodiment has a power supply mode and a power cut-off mode as operation modes. However, the printer of the third embodiment is different from the printer of the second embodiment in the configuration of the power supply cutoff circuit. Hereinafter, the configuration and operation of the power supply cutoff circuit in the printer of the third embodiment will be described.

C1. Configuration of power supply cutoff circuit:
FIG. 8 is an explanatory diagram showing a schematic configuration of a power supply cutoff circuit provided in the printer of the third embodiment. As can be seen from a comparison between FIG. 8 and FIG. 6, in the printer of the third embodiment, the power supply cutoff circuit includes a switch control signal generation circuit 15B instead of the switch control signal generation circuit 15A in the second embodiment. ing. The switch control signal generation circuit 15B includes an OR circuit 15c in addition to the latch circuit 15a and the latch release prohibiting circuit 15b. The OR circuit 15c receives the state signal VST output from the latch circuit 15a and indicating the latch state of the latch circuit 15a, and the latch release signal VRST that has passed through the latch release prohibiting circuit 15b. The state signal VST is the same signal as the switch control signal VSC in the second embodiment. The switch control signal generation circuit 15B outputs the signal output from the OR circuit 15c to the switch circuit 14 as the switch control signal VSC.

  That is, the switch control signal generation circuit 15B latches the OR circuit 15c with the state signal VST indicating that the latch start signal VLT is latched from the latch circuit 15a and the latch release prohibition circuit 15b. During the period when the release signal VRST is input, the switch control signal VSC that should cut off the supply of DC power to the internal circuit is generated. In addition, the switch control signal generation circuit 15B has a DC power to the internal circuit during a period in which neither the state signal VST indicating that the latch start signal VLT is latched nor the latch release signal VRST is input to the OR circuit 15c. The switch control signal VSC that should be cut off is not generated.

C2. Operation of power supply cutoff circuit:
FIG. 9 is a timing chart showing the operation of the power supply cutoff circuit in the printer of the third embodiment. The operation from time t0 to time t3 is the same as the operation of the power supply cutoff circuit in the printer of the second embodiment (see FIG. 7).

  In the power supply cutoff circuit in the printer of the second embodiment described above, when the tact switch 12 is turned off at time t3, that is, when the operation mode is the power cutoff mode, the latch release signal VRST As a result, the latch circuit 15a is unlatched, so that the switch circuit 14 is closed. For this reason, even if the tact switch 12 is in an OFF state, a current flows from the smoothing capacitor 13 to the internal circuit including the CPU 17, and the internal circuit may malfunction.

  On the other hand, in the power supply cutoff circuit in the printer of the third embodiment, the latch release signal VRST is input to the OR circuit 15c at time t3, and this latch release signal VRST is a switch that should open the switch circuit 14. Since the control signal VSC is output from the switch control signal generation circuit 15B to the switch circuit 14, the switch circuit 14 can be held in the open state. Therefore, the malfunction of the internal circuit described above can be prevented.

  In the power supply cut-off circuit in the printer of the third embodiment, when the latch release prohibiting circuit 15b is omitted, the input terminal 12a and the output terminal 12b of the tact switch 12 are shown as shown by a one-dot chain line in FIG. When the potential difference generated between the first and second voltages exceeds a predetermined value, a latch release signal VRST is output from the potential difference detection circuit 16, and this latch release signal VRST is used as a switch control signal VSC as a switch control signal generation circuit 15B (OR circuit 15c). ) Is output. For this reason, the switch circuit 14 may be in an open state while the operation mode is the power supply mode. However, since the present embodiment includes the latch release prohibiting circuit 15b, the above-described problems do not occur.

  Similarly to the printer 10 of the first embodiment and the printer of the second embodiment, the latch release signal output from the potential difference detection circuit 16 without using the discharge resistor R also by the printer of the third embodiment described above. Since the latch circuit 15a can be unlatched by VRST, it is possible to achieve both downsizing the printer and shortening the latch release time.

D. Variations:
As mentioned above, although several embodiment of this invention was described, this invention is not limited to such embodiment at all, and implementation in various aspects is possible within the range which does not deviate from the summary. It is. For example, the following modifications are possible.

D1. Modification 1:
In the printer 10 of the first embodiment, the power supply cutoff circuit includes the potential difference detection circuit 16, and the potential difference detection circuit 16 outputs the latch release signal VRST to the switch control signal generation circuit 15. Is not limited to this. A latch release signal generation unit that detects a connection state between the input terminal 12a and the output terminal 12b of the tact switch 12 and outputs the latch release signal VRST to the switch control signal generation circuit 15 when the connection state is an off state. The power supply cutoff circuit may be provided.

  FIG. 10 is an explanatory diagram illustrating a schematic configuration of a power supply cutoff circuit in a printer according to a modification. As can be seen from a comparison between FIG. 10 and FIG. 2, the power supply cutoff circuit in the printer of the modification includes a sensor 16 s instead of the potential difference detection circuit 16 in the first embodiment. The sensor 16s detects whether the tact switch 12 is set to an off state or an on state. The sensor 16s outputs the latch release signal VRST to the switch control signal generation circuit 15 when the tact switch 12 is set to the off state. Further, the sensor 16s does not output the latch release signal VRST to the switch control signal generation circuit 15 when the tact switch 12 is set to the on state. The sensor 16s may be any sensor that can detect whether the tact switch 12 is set to the off state or the on state. For example, various sensors such as an optical sensor and an ultrasonic sensor may be used. Applicable. Even if the power supply cutoff circuit has the above-described configuration, the same effect as the printer 10 of the first embodiment can be obtained.

D2. Modification 2:
In the above embodiment, the latch start signal VLT output from the error detection circuit 18 is input to the latch circuit 15a included in the power supply cutoff circuit. However, this may be omitted.

D3. Modification 3:
In the above embodiment, the tact switch 12 is used as the power switch provided in the power supply cutoff circuit, but the present invention is not limited to this. In the present invention, in general, the power switch is a power switch having an input terminal, an output terminal, and an operation unit, and the attitude of the operation unit is set to a first state in which the connection state between the input terminal and the output terminal is turned on. A type in which the connection state is switched by the switching operation for switching between the posture and the second posture in which the connection state is turned off, and the posture and the connection state of the operation unit are maintained unless the switching operation is performed. Any switch can be used. Examples of such a switch include a toggle switch, a slide switch, and a rocker switch.

D4. Modification 4:
In the above embodiment, the case where the present invention is applied to a printer has been described. However, the present invention can also be applied to information devices other than a printer.

DESCRIPTION OF SYMBOLS 10 ... Printer 12 ... Tactile switch 12a ... Input terminal 12b ... Output terminal 12c ... Operation part 13 ... Smoothing capacitor 13a ... 1st terminal 13b ... 2nd terminal 13R ... Resistor 14 ... Switch circuit 15, 15A, 15B ... Switch Control signal generation circuit 15a, 15Ra ... latch circuit 15b ... latch release prohibition circuit 15c ... OR circuit 16 ... potential difference detection circuit 16s ... sensor 17 ... CPU
18 ... Error detection circuit 20 ... AC adapter 22, 24 ... Power cable 30 ... Printer cable 100 ... Computer system VLT ... Latch start signal VRST ... Latch release signal VSC ... Switch control signal VPR ... Latch release disable signal VST ... Status signal R ... Discharge resistance

Claims (7)

An information device having a first operation mode in which DC power is supplied from a power supply device and a second operation mode in which supply of the DC power from the power supply device is interrupted,
A controller that operates with the DC power and outputs a latch start signal;
The input terminal connected to the power supply apparatus, the output terminal, and the first attitude in which the connection state between the input terminal and the output terminal is turned on and the second attitude in which the connection state is turned off. A power switch having an operation unit;
A smoothing capacitor having a first terminal connected to the output terminal of the power switch and a second terminal grounded;
A switch circuit connected between the output terminal of the power switch and the control unit, and for switching between supply and interruption of the DC power to the control unit;
A switch control signal that includes a latch circuit that latches the latch start signal input from the control unit, and that blocks supply of the DC power to the control unit based on a latch state of the latch start signal in the latch circuit And a switch control signal generation circuit that outputs the switch control signal to the switch circuit;
Latch release for detecting the connection state in the power switch and outputting a latch release signal for releasing the latch of the latch start signal in the latch circuit to the switch control signal generation circuit when the connection state is an off state A signal generation unit,
The latch circuit and the latch release signal generation unit are configured to be operable by the DC power supplied from the output terminal of the power switch or the smoothing capacitor.
The control unit outputs the latch start signal to the switch control signal generation circuit when shifting from the first operation mode to the second operation mode,
When the latch release signal is input to the latch circuit, the latch circuit releases the latch of the latch start signal,
The information device, wherein the switch circuit is opened when the switch control signal is input, and is closed when the switch control signal is not input. As before SL latch release signal generation unit detects a potential difference between said input terminal of said power switch and said output terminal, when the potential difference is equal to or greater than a predetermined value, the connection state is off state, The information device according to claim 1, further comprising a potential difference detection circuit that outputs the latch release signal to the switch control signal generation circuit. Between the first terminal of the pre-Symbol smoothing capacitor and said latch circuit comprises a resistor vessels that Ru to discharge the residual charge of the smoothing capacitor,
Wherein the resistance value of the resistor, the information apparatus according to claim 2 that will be set based on the power consumption and the discharge time when discharging of the residual charge. Before SL controller, prior SL period is the first operation mode, and outputs a latch release prohibition signal to the switch control signal generating circuit, when moving from front Symbol first mode of operation to the second operation mode To stop the output of the latch release prohibiting signal,
Said switch control signal generating circuit, before Symbol period unlatch inhibiting signal is inputted, according to claim 2 or 3, wherein the information device includes a latch release prohibition circuit for prohibiting the input of said latch release signal to the latch circuit . Before SL switch control signal generating circuit, the previous SL said latch release signal that the period between your good beauty before Symbol unlatch prohibition circuit state signal is input indicating that latches the latch start signal from the latch circuit period is input, generates the switch control signal you cut off the supply of the DC power to the control unit,
The period during which the state signal and said latch release signal indicating that the latch start signal has been latched is not input, the DC power supply wherein the do not want to generate a switch control signal you cut off the O to the control unit With R circuit,
The information device according to claim 4 , wherein a signal output from the OR circuit is output as the switch control signal. Before SL control unit includes an error detection unit for detecting an error,
The information device according to claim 1 , wherein the error detection unit outputs the latch start signal to the switch control signal generation circuit when the error is detected. Before SL information equipment, information equipment according to any one of claims 1 to 6 is the printer.

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