JP2008290658A - Vehicle control device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a vehicle control device for correctly downloading an interrupt input restored from a sleep mode into a CPU even if the CPU is in the sleep mode such as standby during reduction in the input signal level of an operation signal from an input means Sw. <P>SOLUTION: The vehicle control device comprises an input means installed in a vehicle, a control means for downloading an input signal from the input means and controlling control equipment depending on the signal, and a voltage fixing means for increasing the potential of an interrupt signal up to a H-level even during reduction in the level of the input signal from the input means. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

The present invention relates to a vehicle control device using a CPU, and more particularly to a vehicle control device that stabilizes signal capture such as switch input from inside and outside.

  In automobiles, motorcycles, outboard motors, and the like, vehicle control devices using a CPU such as an engine control device or a transmission control device are generally widely used. In such a control device, an external signal is taken into the CPU via an input switch such as a power switch or a brake switch that applies a battery voltage such as a key switch, stored in a memory, calculated by a predetermined program, and a control device. Is driven.

The vehicle control apparatus captures such various switch inputs into the CPU. At this time, the input signal level may be lowered due to some cause such as a change in the external situation or a change in the situation inside the vehicle. A typical example of this is the flooding of the input switch, which causes a current leakage of the input switch, and there is a problem that a predetermined detection operation based on a threshold set in advance according to the input signal level cannot be performed normally. there were.

Hereinafter, this state will be described with reference to FIGS. FIG. 8 shows an example of a conventional interface circuit that takes in a switch input. The operation signal of the input means Sw is taken into the CPU from the input port IN through the resistor R2. A voltage of about 5 V, for example, is applied from the Vcc terminal via the resistor R1 between the resistor R2 and the I / F terminal of the vehicle control device. R3 is a resistance of a leakage current that flows due to the above-described wet water and the like, and a current flows even though Sw is OFF through this, so that the level of the signal input to the input port IN is lowered.

FIG. 9 shows the waveform of the input signal to the CPU at this time. The normal operation is indicated by a dotted line, and the operation when the signal level is lowered is indicated by a solid line. Normally, the voltage of Vcc is input when Sw is OFF, and the ground potential 0 V is input when Sw is ON, and the H side threshold Vth (H1) and the L side threshold Vth (L).
And ON and OFF are detected. On the other hand, when the signal level is lowered, when Sw is OFF, a voltage equal to or less than 1/2 of Vcc becomes the ground potential 0 V when Sw is ON, and the H-side threshold Vth (H1) is not straddled. The state of waiting for H continues, and the input signal cannot be captured even if Sw is turned ON or OFF.

In order to correctly determine the input signal even in such a situation, conventionally, as shown in Patent Document 1, it is conceivable to change the threshold value by detecting a change in the situation. That is, when the signal level decreases, the threshold set by the CPU is changed from Vth (H1) to Vth (H) so that the input signal crosses the threshold Vth (H) even when the signal level decreases. Therefore, a predetermined correct detection operation can be performed.

JP-A-6-316255

  According to Patent Document 1, when a deceleration greater than a predetermined value is detected by the braking detection means, the threshold value for detecting abnormality of the power supply voltage during braking or anti-skid control is changed to a low value, thereby stabilizing This is to achieve anti-skid control. However, for example, when there is no access for a certain period of time when the control device or the like is on standby, the sleep mode is often used to stop power supply and reduce power consumption. When used, the threshold value could not be set arbitrarily. This is because the threshold value for interrupt input is usually determined by the hardware of the microcomputer and cannot be freely set by the microcomputer user.

  FIG. 10 shows the waveform of the input signal to the CPU at this time. Even if the interrupt input INT is input as shown in FIG. 10 and Sw is shifted from ON to OFF, the H signal straddles the threshold value Vth (H). If the CPU does not exist, the CPU always determines that L is input regardless of whether the SW is ON or OFF, and no interruption occurs regardless of how the SW is operated. Therefore, in such a case, there is a problem that it is impossible to return from sleep.

  The present invention has been made to solve the above-described problems. When the signal level of the operation signal input of the input means Sw is lowered, the CPU returns from the sleep mode even when the CPU is in the standby mode. It is an object of the present invention to provide a vehicle control apparatus that can correctly capture an interrupt input to the CPU.

  The vehicle control apparatus according to the present invention comprises an input means installed in a vehicle, a control means for taking in an input signal from the input means and controlling a control device in accordance with the input signal, and an input signal level from the input means. Voltage level fixing means for raising the potential of the interrupt input signal to the control means to H level even when the voltage drops due to an external factor is provided.

  According to the above-described vehicle control device according to the present invention, even when the signal level of the operation signal input of the input means Sw is lowered due to an external factor, it is possible to correctly capture an interrupt signal for returning from the sleep mode. Have.

Embodiment 1 of the Invention
A vehicle control apparatus according to Embodiment 1 of the present invention will be described below. FIG. 1 shows an example of an interface circuit that takes in a switch input according to Embodiment 1 of the present invention. In the figure, the same reference numerals are given to the same and corresponding parts as those of the conventional apparatus of FIG. In FIG. 1, the operation signal of the input means Sw is normally taken into the CPU from the AD input port AD via the resistor R2. The connection point between the resistor R2 and the I / F terminal is connected to the constant voltage Vcc via the resistor R1, and further connected to the Vcc terminal via the resistor R4, the resistor R5, and the first transistor Tr1. The connection point between the resistors R4 and R5 is connected to the CPU from the interrupt terminal INT port. The collector of the second transistor Tr2 is connected to the base of the transistor Tr1.

  The base of the second transistor Tr2 is connected to the output port of the CPU. When an interrupt is input to the input means Sw, the CPU senses this, and a signal is sent from the CPU output port to the base of the transistor Tr2. It is output. The combination circuit of the transistor Tr1 and the transistor Tr2 constitutes a voltage level fixing means L. The two transistors are made conductive by the output from the CPU, and the potential of the interrupt terminal INT port of the CPU is divided by the resistors R5 and R4. It is raised to the rank.

  FIG. 2 shows the CPU input signal when the signal level is lowered due to water or the like when the circuit is active (not in the sleep state). As described above, the interrupt input INT is fixed to the H side as shown by the dotted line in the figure by the voltage level fixing means L that operates by the output from the CPU. The AD port input repeats ON and OFF at the level when the signal level drops as shown by the solid line in the figure. Therefore, by setting the threshold value due to AD input to Vth (H), Vth (L), ON / OFF of Sw can be taken in normally.

  FIG. 3 shows the state of the CPU input signal when shifting from the active mode to the sleep mode. It should be noted that the input unit Sw is always turned off when shifting to the sleep mode. Since the transistor Tr1 in FIG. 1 is ON before sleep as described above, the INT input level is raised to the H side. However, since the transistor Tr1 is turned OFF during sleep, the INT input level is increased. Will drop to the same level as that of the AD input. However, the resistance R1 in FIG. 1 does not drop below the same level as the AD input OFF signal, and does not cross Vth (L): INT which is the L side threshold value of the interrupt input INT. Go to sleep while waiting. Of course, the AD input level remains the same, so AD does not cross the L-side threshold. Note that the L-side or H-side threshold value of the interrupt input INT is preset in the CPU.

Next, the state of the CPU input signal when returning from the sleep mode to the active mode will be described with reference to FIG. Assuming that Sw is turned ON at point A to return from the sleep mode to the active mode, the INT input that has been at the same intermediate level as the AD input OFF signal as described above shifts to the ON state. As a result, the INT input crosses Vth (L): INT which is the L-side threshold value, so that the CPU detects that the interrupt input INT has become L, and the conduction signal of the voltage level fixing means L is output from its output port. appear. As a result, the transistors Tr1 and Tr2 become conductive, the level of the INT input is raised, and when the input means Sw is turned off at the point B, the INT input crosses the threshold Vth (H) INT on the H side.
In this way, the control device that has returned to the active mode returns to the state of FIG. 2 again, and thereafter repeats these patterns.

  As described above, according to the first embodiment, even when the signal level of the operation signal input of the input means Sw is lowered due to an external factor, the sleep state due to the interrupt can be dealt with the return signal when active. By fixing the INT input potential at the H level, the input signal can be correctly captured even when the threshold cannot be arbitrarily set.

Embodiment 2 of the Invention
Next, a vehicle control apparatus according to Embodiment 2 of the present invention will be described with reference to FIG. FIG. 5 shows an example of an interface circuit that takes in the switch input as in FIG. 1. In FIG. 5, the same reference numerals are given to the same and corresponding parts as in FIG. 5 is different from FIG. 1 in that the analog input port is reduced by one from the CPU input port and only the INT port is provided. It should be noted that the condition that the input means Sw is always turned off when shifting to the sleep mode is the same as in the previous embodiment.

FIG. 6 shows the state of the CPU input signal in the sleep mode in the interface circuit of FIG. Needless to say, an INT input is shown in a state where the signal level of the input means Sw is lowered due to a current leakage due to water.
Immediately after the input means Sw is turned off, the signal level decreases, so that the threshold value Vth (H) on the H side does not cross INT, but the transistor Tr1 is periodically turned on from the CPU output port to force By raising the potential of the INT port and straddling the threshold value Vth (H): INT and waiting for L, it is possible to wait for the input means Sw to be turned on next time.

  In this state, while the transistor Tr1 is turned on, even if the input means Sw is turned on, the INT input does not drop to a point below the L-side threshold value Vth (L) INT, so the INT input cannot be detected. However, if the period during which the transistor Tr1 is turned on is set to be sufficiently shorter than the time when the input means Sw is turned on, and the frequency with which the transistor Tr1 is turned on is increased, the input means while the transistor Tr1 is not turned on. Sw can be input to the CPU, and there is substantially no problem. That is, for example, when the input means Sw is turned on at the point B, the threshold value Vth (L) INT that is the L-side threshold is crossed, and the CPU detects the input signal.

  FIG. 7 shows the state of the CPU input signal when shifting from the active mode to the sleep mode. In order to shift from the active mode to the sleep mode, as long as the input means Sw is turned off for a certain period of time and the transistor Tr1 is turned on during that time as shown in FIG. Is in a state of waiting for L, the INT input can be detected when the input means is turned ON at the time of sleep and can return from the sleep mode.

  As described above, according to the second embodiment of the present invention, when the signal level of the input means decreases due to an external factor, a signal can be correctly captured even when the threshold value cannot be set arbitrarily, and active The AD input required for monitoring the input means at the time becomes unnecessary, and the circuit configuration can be simplified.

2 shows an example of an interface circuit that takes in a switch input according to the first embodiment of the present invention. 2 shows a CPU input signal when the signal level is lowered due to water or the like when the circuit of FIG. 1 is active. In the interface circuit of FIG. 1, the state of the CPU input signal when shifting from the active mode to the sleep mode is shown. In the interface circuit of FIG. 1, the state of the CPU input signal when returning from the sleep mode to the active mode is shown. The example of an interface circuit which takes in switch input by Embodiment 2 of this invention is shown. In the interface circuit of FIG. 5, the state of the CPU input signal when shifting from the sleep mode to the active mode is shown. In the interface circuit of FIG. 5, the state of the CPU input signal when shifting from the active mode to the sleep mode is shown. An example of an interface circuit for capturing a conventional general switch input is shown. An input signal waveform to the CPU when the signal level is lowered is shown. The waveform of the input signal to the CPU when using the interrupt input is shown.

Explanation of symbols

Sw input means, CPU microprocessor,
R3 leakage resistance, R1, R2, R4 resistance,
L voltage rise circuit, PU level fixing means,
Tr1, Tr2 transistors.

Claims (6)

  There are input means installed in the vehicle, control means for taking in the input signal from the input means and controlling the control device in accordance with the signal, and when the input signal level from the input means is lowered due to an external factor. However, the vehicle control apparatus further comprises voltage level fixing means for raising the potential of the interrupt input signal to the control means to the H level.   The voltage level fixing means is constituted by a transistor circuit that is turned on by an output from the control means that detects the interrupt signal and raises the potential of the interrupt input terminal to a predetermined H level threshold potential. The vehicle control device according to claim 1.   The control means makes the voltage level fixing means conductive when detecting the interrupt input, the AD port for monitoring the ON / OFF signal of the input means, the interrupt input port controlled by the voltage level fixing means The vehicle control device according to claim 1, further comprising an output port that outputs a signal.   The vehicle control device according to claim 1, wherein the interrupt input is a return signal from a sleep mode to an active mode.   3. The control means according to claim 1, further comprising: an interrupt input port controlled by the voltage raising circuit; and an output port for outputting a signal for periodically conducting the voltage level fixing means. The vehicle control device described in 1.   By setting the period during which the voltage raising circuit is turned on to be substantially sufficiently shorter than the time when the input means is turned on, a signal from the input means is sent to the control means while the voltage level fixing means is not turned on. The vehicle control device according to claim 5, wherein the vehicle control device is caused to input to the vehicle.

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