JP5594855B2 - 配線基板 - Google Patents
配線基板 Download PDFInfo
- Publication number
- JP5594855B2 JP5594855B2 JP2013111880A JP2013111880A JP5594855B2 JP 5594855 B2 JP5594855 B2 JP 5594855B2 JP 2013111880 A JP2013111880 A JP 2013111880A JP 2013111880 A JP2013111880 A JP 2013111880A JP 5594855 B2 JP5594855 B2 JP 5594855B2
- Authority
- JP
- Japan
- Prior art keywords
- conductor
- connection
- strip
- wiring
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Description
2a 第1の接続パッド
2b 第2の接続パッド
3a 第1の帯状配線導体
3b 第2の帯状配線導体
4a 第1の接続導体
4b 第2の接続導体
Claims (1)
- 絶縁基板の表面に被着されており、第1の間隔で互いに離間して配置された第1および第2の接続パッドと、前記絶縁基板の表面または内部に被着されており、前記第1および第2の接続パッドに近接する位置に一端を有するとともに前記第1の間隔よりも狭い一定の第2の間隔で互いに同じ長さおよび同じ幅で並行して延在する第1および第2の帯状配線導体と、前記絶縁基板の表面または内部に被着されており、前記第1の接続パッドと前記第1の帯状配線導体における前記一端とを接続する第1の接続導体および前記第2の接続パッドと前記第2の帯状配線導体における前記一端とを接続する第2の接続導体とを含むペア伝送路を具備して成るとともに前記ペア伝送路を高周波信号が伝送される配線基板であって、前記第1の接続導体と前記第2の接続導体とが互いに同じ長さであるとともに、前記第1の接続導体の幅と第2の接続導体の幅とを相違させて前記第1の接続導体と第2の接続導体とのインダクタンスを互いに相違させることにより前記ペア伝送路における周波数特性に前記高周波信号の周波数帯域で共振点が形成されるようにしたことを特徴とする配線基板。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013111880A JP5594855B2 (ja) | 2013-05-28 | 2013-05-28 | 配線基板 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013111880A JP5594855B2 (ja) | 2013-05-28 | 2013-05-28 | 配線基板 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009077611A Division JP2010232382A (ja) | 2009-03-26 | 2009-03-26 | 配線基板 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2013179692A JP2013179692A (ja) | 2013-09-09 |
JP5594855B2 true JP5594855B2 (ja) | 2014-09-24 |
Family
ID=49270849
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2013111880A Expired - Fee Related JP5594855B2 (ja) | 2013-05-28 | 2013-05-28 | 配線基板 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP5594855B2 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6560096B2 (ja) * | 2015-10-22 | 2019-08-14 | 京セラ株式会社 | 実装構造体およびカメラモジュール |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6518663B1 (en) * | 1999-08-30 | 2003-02-11 | Texas Instruments Incorporated | Constant impedance routing for high performance integrated circuit packaging |
JP2003218481A (ja) * | 2002-01-24 | 2003-07-31 | Mitsubishi Electric Corp | プリント基板および多ピンコネクタ実装用プリント基板 |
US7531751B2 (en) * | 2005-04-26 | 2009-05-12 | Kabushiki Kaisha Toshiba | Method and system for an improved package substrate for use with a semiconductor package |
JP2008244703A (ja) * | 2007-03-27 | 2008-10-09 | Nec Corp | 差動信号線路 |
-
2013
- 2013-05-28 JP JP2013111880A patent/JP5594855B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
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JP2013179692A (ja) | 2013-09-09 |
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