JP5590868B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP5590868B2 JP5590868B2 JP2009275159A JP2009275159A JP5590868B2 JP 5590868 B2 JP5590868 B2 JP 5590868B2 JP 2009275159 A JP2009275159 A JP 2009275159A JP 2009275159 A JP2009275159 A JP 2009275159A JP 5590868 B2 JP5590868 B2 JP 5590868B2
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
Description
本実施の形態では、単極性の駆動回路を構成する微結晶半導体で構成した薄膜トランジスタとして、nチャネル型の薄膜トランジスタを用いる。そして画素部を駆動するための駆動回路として、ソース線駆動回路、及び/またはゲート線駆動回路について一例を挙げて説明し、本実施の形態の利点について述べていくこととする。
上記実施の形態においては、表示装置の駆動回路におけるシフトレジスタとして、スタティック回路によるシフトレジスタにおける一例について示したが、本実施の形態では、ダイナミック回路によるシフトレジスタを用いて駆動回路を構成する一例について説明する。
本実施の形態では、しきい値電圧の変動の少ない表示装置のシフトレジスタの基本構成について、図面を参照して説明する。図19は、シフトレジスタが有する複数のフリップフロップのうち、ある1段(例えば1段目)のフリップフロップを示している。
本実施の形態では、駆動回路を含む表示装置における画素部の作製工程について、図21乃至図26を用いて説明する。
本実施の形態では、実施の形態1乃至実施の形態4に用いることが可能な薄膜トランジスタの構造及びその作製方法について、図29を用いて示す。
本実施の形態では、実施の形態1乃至実施の形態5に用いることが可能な薄膜トランジスタの構造及びその作製方法について、図31を用いて示す。
本実施の形態では、実施の形態1、実施の形態5、及び実施の形態6に示すゲート絶縁層409、第1の半導体層410、第2の半導体層411、不純物半導体層417や、実施の形態3に示すゲート絶縁層1107、第1の半導体層1109、第2の半導体層1110、不純物半導体層1115に適用可能な形態について示す。
上記実施の形態に係る表示装置は、さまざまな電子機器(遊技機も含む)に適用することができる。電子機器としては、例えば、テレビジョン装置(テレビ、またはテレビジョン受信機ともいう)、コンピュータ用のモニタ、電子ペーパー、デジタルカメラ、デジタルビデオカメラ、デジタルフォトフレーム、携帯電話機(携帯電話、携帯電話装置ともいう)、携帯型ゲーム機、携帯情報端末、音響再生装置、パチンコ機等の大型ゲーム機等が挙げられる。
Claims (4)
- 駆動回路を有し、
前記駆動回路は、第1のトランジスタと、第2のトランジスタと、を有し、
前記第1のトランジスタのゲートは、前記第1のトランジスタのソース又はドレインの一方と電気的に接続され、
前記第1のトランジスタのソース又はドレインの一方は、第1の配線と電気的に接続され、
前記第1のトランジスタのソース又はドレインの他方は、前記第2のトランジスタのソース又はドレインの一方と電気的に接続され、
前記第2のトランジスタのソース又はドレインの他方は、第2の配線と電気的に接続され、
前記第1のトランジスタ及び前記第2のトランジスタは、
ゲート電極と、
前記ゲート電極上方の、絶縁層と、
前記絶縁層上方の、半導体層と、
前記半導体層上方の、電極と、を有し、
前記半導体層は、
微結晶半導体を有する第1の領域と、
前記第1の領域上方の、微結晶半導体及び非晶質半導体を有する第2の領域と、を有し、
前記第1のトランジスタと前記第2のトランジスタは、極性が同一であり、
前記第2の領域は、窒素を有することを特徴とする半導体装置。 - 駆動回路を有し、
前記駆動回路は、第1のトランジスタと、第2のトランジスタと、を有し、
前記第1のトランジスタのゲートは、前記第1のトランジスタのソース又はドレインの一方と電気的に接続され、
前記第1のトランジスタのソース又はドレインの一方は、第1の配線と電気的に接続され、
前記第1のトランジスタのソース又はドレインの他方は、前記第2のトランジスタのソース又はドレインの一方と電気的に接続され、
前記第2のトランジスタのソース又はドレインの他方は、第2の配線と電気的に接続され、
前記第1のトランジスタ及び前記第2のトランジスタは、
ゲート電極と、
前記ゲート電極上方の、絶縁層と、
前記絶縁層上方の半導体層と、
前記半導体層上方の電極と、を有し、
前記半導体層は、
微結晶半導体を有する第1の領域と、
前記第1の領域上方の、微結晶半導体及び非晶質半導体を有する第2の領域と、
前記第2の領域上方の、非晶質半導体を有する第3の領域と、を有し、
前記第1のトランジスタと前記第2のトランジスタは、極性が同一であり、
前記第2の領域は、窒素を有することを特徴とする半導体装置。 - 請求項1又は2において、
前記第2の領域が有する微結晶半導体は、凸状又は錐形状であることを特徴とする半導体装置。 - 請求項1乃至3のいずれか一項において、
前記第1のトランジスタ及び前記第2のトランジスタは、エンハンスメント型トランジスタであることを特徴とする半導体装置。
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