JP5562921B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP5562921B2 JP5562921B2 JP2011231495A JP2011231495A JP5562921B2 JP 5562921 B2 JP5562921 B2 JP 5562921B2 JP 2011231495 A JP2011231495 A JP 2011231495A JP 2011231495 A JP2011231495 A JP 2011231495A JP 5562921 B2 JP5562921 B2 JP 5562921B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- region
- drain
- compound semiconductor
- semiconductor layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims description 93
- 150000001875 compounds Chemical class 0.000 claims description 40
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 10
- 238000000034 method Methods 0.000 description 13
- 238000004519 manufacturing process Methods 0.000 description 9
- 239000002184 metal Substances 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 6
- 230000015556 catabolic process Effects 0.000 description 5
- 239000000463 material Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
- H01L29/812—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0605—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
- H01L29/812—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate
- H01L29/8126—Thin film MESFET's
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Junction Field-Effect Transistors (AREA)
- Electrodes Of Semiconductors (AREA)
Description
11・・・化合物半導体層
12・・・アクティブ層
12a・・・平面部(ソース領域)
12b・・・帯状部
12c・・・接続部
13・・・ドレイン領域
14・・・チャネル領域
15・・・ドレイン電極
16・・・ソース電極
17・・・ゲート電極
18・・・平面状のアクティブ層
19・・・第1のレジスト層
19a・・・開口部
20・・・第2のレジスト層
20a、20b・・・開口部
21・・・第3のレジスト層
21a・・・開口部
22・・・空乏層
31・・・分離層
32・・・ドレインパッド
33・・・ソースパッド
34・・・ゲートパッド
Claims (7)
- 化合物半導体層上に形成され、所望の厚さを有し、かつ直線状の4辺で囲まれる四角形状のソース領域と、
このソース領域の前記直線状の一辺上の互いに離間した位置から、前記直線状の一辺に接し、かつ互いに平行に延在するように前記化合物半導体層上にMESA状に形成され、それぞれが前記ソース領域より狭い幅を有する帯状の複数のチャネル領域と、
これらのチャネル領域にそれぞれ接続され、前記チャネル領域と同一方向に延在するように前記化合物半導体層上にMESA状に形成され、それぞれが前記チャネル領域と同一の幅を有する帯状の複数のドレイン領域と、
前記ソース領域上の少なくとも一部に形成されたソース電極と、
前記複数のドレイン領域に電気的に接続されるように形成されたドレイン電極と、
前記複数のチャネル領域の周囲を覆い、かつ前記ソース領域の前記直線状の一辺に接するように形成されたゲート電極と、
を具備することを特徴とする半導体装置。 - 前記複数のドレイン領域、および前記複数のチャネル領域からなる複数の帯状部の間には、これらの帯状部を互いに電気的に分離する分離層が形成されていることを特徴とする請求項1に記載の半導体装置。
- 前記ソース電極は、前記ソース領域上の少なくとも一部を含む前記化合物半導体層上に形成されるとともに、前記ドレイン電極は、前記複数のドレイン領域に電気的に接続されるように前記化合物半導体層上に形成され、
前記ゲート電極は、前記複数のチャネル領域を含む前記化合物半導体層上に、前記複数のドレイン領域の延在方向に対して交わる方向に延びるように形成されたことを特徴とする請求項1または2に記載の半導体装置。 - 前記ドレイン電極は、前記複数のドレイン領域を含む前記化合物半導体層上に形成されたことを特徴とする請求項1乃至3のいずれかに記載の半導体装置。
- 前記ドレイン領域は、さらにこれらを接続する接続部を有することを特徴とする請求項1乃至3のいずれかに記載の半導体装置。
- 前記ドレイン電極は、前記接続部を含む前記化合物半導体層上に形成されたことを特徴とする請求項5に記載の半導体装置。
- 前記化合物半導体層は、GaAsまたはGaNからなり、
前記ソース領域、前記ドレイン領域、および前記チャネル領域は、n型にドーピングされたGaAsまたはGaNからなることを特徴とする請求項1乃至6のいずれかに記載の半導体装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011231495A JP5562921B2 (ja) | 2011-10-21 | 2011-10-21 | 半導体装置 |
US13/603,310 US8872282B2 (en) | 2011-10-21 | 2012-09-04 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011231495A JP5562921B2 (ja) | 2011-10-21 | 2011-10-21 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2013089894A JP2013089894A (ja) | 2013-05-13 |
JP5562921B2 true JP5562921B2 (ja) | 2014-07-30 |
Family
ID=48135289
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011231495A Expired - Fee Related JP5562921B2 (ja) | 2011-10-21 | 2011-10-21 | 半導体装置 |
Country Status (2)
Country | Link |
---|---|
US (1) | US8872282B2 (ja) |
JP (1) | JP5562921B2 (ja) |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2554639B1 (fr) * | 1983-11-08 | 1986-02-21 | Thomson Csf | Transistor a effet de champ a tension de seuil reglable, et circuit integre comportant ce type de transistors |
JPH06140637A (ja) * | 1992-10-28 | 1994-05-20 | Sanyo Electric Co Ltd | 電界効果型トランジスタ |
JPH06168957A (ja) * | 1992-11-27 | 1994-06-14 | New Japan Radio Co Ltd | 金属・半導体電界効果トランジスタ |
JP3129264B2 (ja) * | 1997-12-04 | 2001-01-29 | 日本電気株式会社 | 化合物半導体電界効果トランジスタ |
US7989855B2 (en) * | 2004-06-10 | 2011-08-02 | Nec Corporation | Semiconductor device including a deflected part |
US8669145B2 (en) * | 2004-06-30 | 2014-03-11 | International Business Machines Corporation | Method and structure for strained FinFET devices |
JP5076278B2 (ja) * | 2005-03-14 | 2012-11-21 | 日亜化学工業株式会社 | 電界効果トランジスタ |
US7279375B2 (en) * | 2005-06-30 | 2007-10-09 | Intel Corporation | Block contact architectures for nanoscale channel transistors |
JP5200323B2 (ja) * | 2005-12-22 | 2013-06-05 | 三菱電機株式会社 | 高周波半導体装置 |
KR100718159B1 (ko) * | 2006-05-18 | 2007-05-14 | 삼성전자주식회사 | 와이어-타입 반도체 소자 및 그 제조 방법 |
JP4406439B2 (ja) * | 2007-03-29 | 2010-01-27 | 株式会社東芝 | 半導体装置の製造方法 |
JP2009111217A (ja) * | 2007-10-31 | 2009-05-21 | Toshiba Corp | 半導体装置 |
JP2010192518A (ja) | 2009-02-16 | 2010-09-02 | Toshiba Corp | 半導体装置 |
-
2011
- 2011-10-21 JP JP2011231495A patent/JP5562921B2/ja not_active Expired - Fee Related
-
2012
- 2012-09-04 US US13/603,310 patent/US8872282B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US8872282B2 (en) | 2014-10-28 |
US20130099325A1 (en) | 2013-04-25 |
JP2013089894A (ja) | 2013-05-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10950524B2 (en) | Heterojunction semiconductor device for reducing parasitic capacitance | |
US9911843B2 (en) | Semiconductor device | |
US8916908B2 (en) | III-nitride heterojunction device | |
JP5728258B2 (ja) | 半導体装置 | |
JP5672756B2 (ja) | 半導体装置 | |
US9754932B2 (en) | Semiconductor device | |
US10833185B2 (en) | Heterojunction semiconductor device having source and drain pads with improved current crowding | |
KR102193086B1 (ko) | 감소된 출력 커패시턴스를 갖는 GaN 장치 및 그 제조 공정 | |
US20160240614A1 (en) | Semiconductor device and semiconductor package | |
JP2022191421A (ja) | 半導体装置 | |
TWI643338B (zh) | 半導體裝置 | |
CN105742360A (zh) | 半导体器件及其制造方法 | |
JP6496149B2 (ja) | 半導体装置および半導体装置の製造方法 | |
JP7161915B2 (ja) | 半導体装置 | |
JP2007115888A (ja) | 半導体装置 | |
JP2011134968A (ja) | 炭化珪素半導体装置およびその製造方法 | |
JPH11266018A (ja) | 半導体装置 | |
JP2001284367A (ja) | 高周波用電界効果トランジスタ | |
US20130146888A1 (en) | Monolithic semiconductor device and method for manufacturing the same | |
US20220085198A1 (en) | Semiconductor device | |
JP5562921B2 (ja) | 半導体装置 | |
EP2770535A2 (en) | Semiconductor device | |
JP6372172B2 (ja) | 化合物半導体装置及びその製造方法 | |
US20210359120A1 (en) | Semiconductor device, communication module, and semiconductor device manufacturing method | |
KR101803736B1 (ko) | GaN 기반의 CMOS 소자 및 그 제조방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20130905 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20130910 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20131108 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140218 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140421 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20140513 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20140611 |
|
LAPS | Cancellation because of no payment of annual fees |