JP5534407B2 - 金属電極を有する半導体素子の形成、及び半導体素子の構造 - Google Patents
金属電極を有する半導体素子の形成、及び半導体素子の構造 Download PDFInfo
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- 229910052751 metal Inorganic materials 0.000 title claims description 90
- 239000002184 metal Substances 0.000 title claims description 90
- 239000004065 semiconductor Substances 0.000 title claims description 36
- 230000015572 biosynthetic process Effects 0.000 title claims 2
- 125000006850 spacer group Chemical group 0.000 claims description 25
- 238000000034 method Methods 0.000 claims description 24
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 15
- 229920005591 polysilicon Polymers 0.000 claims description 15
- 239000000758 substrate Substances 0.000 claims description 14
- 239000000463 material Substances 0.000 claims description 12
- 150000004767 nitrides Chemical class 0.000 claims description 9
- 239000004020 conductor Substances 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 claims 20
- 239000010410 layer Substances 0.000 description 110
- 229910021332 silicide Inorganic materials 0.000 description 14
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 6
- 238000000059 patterning Methods 0.000 description 5
- 235000012239 silicon dioxide Nutrition 0.000 description 5
- 239000000377 silicon dioxide Substances 0.000 description 5
- 229910044991 metal oxide Inorganic materials 0.000 description 4
- 150000004706 metal oxides Chemical class 0.000 description 4
- 230000003071 parasitic effect Effects 0.000 description 4
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 239000011229 interlayer Substances 0.000 description 3
- NFFIWVVINABMKP-UHFFFAOYSA-N methylidynetantalum Chemical compound [Ta]#C NFFIWVVINABMKP-UHFFFAOYSA-N 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- 229910003468 tantalcarbide Inorganic materials 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 229910001092 metal group alloy Inorganic materials 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 229910000449 hafnium oxide Inorganic materials 0.000 description 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 230000002123 temporal effect Effects 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Semiconductor Memories (AREA)
- Junction Field-Effect Transistors (AREA)
- Thin Film Transistor (AREA)
Description
Claims (18)
- 半導体素子の製造方法において、
ゲート誘電体を基板の上に形成する工程と、
金属電極をゲート誘電体の上に形成する工程と、
第1犠牲層を金属電極の上に形成する工程であって、第1犠牲層がポリシリコン及び金属から成るグループから選択される材料を含む、前記第1犠牲層を形成する工程と、
第1犠牲層を除去する工程と、
前記金属電極とは別に準備したゲート電極コンタクトを、金属電極の上に位置し、かつ金属電極に接続されるように形成する工程とを備え、
前記ゲート電極コンタクトを形成する工程は、前記第1犠牲層を除去した後に前記金属電極及び前記基板の上に誘電体層を形成すること、前記金属電極の幅よりも狭いコンタクト開口を前記金属電極にまで達するように該誘電体層に形成すること、及び、前記コンタクト開口に導電材料を充填することを含む、半導体素子の製造方法。 - スペーサを金属電極及び第1犠牲層に隣接して形成する工程をさらに備え、前記スペーサの形成が第1犠牲層を除去する前に行なわれる、請求項1記載の半導体素子の製造方法。
- 第1犠牲層を形成する工程は、ポリシリコンを含む第1犠牲層を形成する工程を含む、請求項1記載の半導体素子の製造方法。
- 第1犠牲層を形成する工程は、第1金属を含む第1犠牲層を形成する工程を含む、請求項1記載の半導体素子の製造方法。
- 第1金属を含む第1犠牲層を形成する工程は、
第1金属を含む第1犠牲層を形成する工程であって、第1犠牲層を金属電極に対して選択的に除去することができる、前記第1犠牲層を形成する工程を含む、請求項4記載の半導体素子の製造方法。 - 金属電極を形成する工程は、第1金属とは異なる第2金属を含む金属電極を形成する工程を含む、請求項4記載の半導体素子の製造方法。
- 金属電極を形成する工程は、2〜20ナノメートルの範囲の厚さを有する金属電極を形成する工程を含み、そして第1犠牲層を形成する工程は、40〜100ナノメートルの範囲の厚さを有する第1犠牲層を形成する工程を含む、請求項1記載の半導体素子の製造方法。
- 第2犠牲層を第1犠牲層の上に形成する工程と、
第2犠牲層を、ゲート電極コンタクトを形成する前に除去する工程とをさらに備える、請求項1記載の半導体素子の製造方法。 - 第2犠牲層を形成する工程は、窒化物を含む第2犠牲層を形成する工程を含む、請求項8記載の半導体素子の製造方法。
- 第2犠牲層を形成する工程は、金属を含む第2犠牲層を形成する工程を含む、請求項8記載の半導体素子の製造方法。
- 半導体素子の製造方法において、
ゲート誘電体を基板の上に形成する工程と、
金属電極をゲート誘電体の上に形成する工程と、
ポリシリコンを含む第1犠牲層を金属電極の上に形成する工程と、
第2犠牲層を第1犠牲層の上に形成する工程と、
スペーサを、金属電極、第1犠牲層、及び第2犠牲層に隣接して形成する工程と、
第2犠牲層を除去する工程と、
第1犠牲層を除去する工程と、
前記金属電極とは別に準備したゲート電極コンタクトを、金属電極の上に位置し、かつ金属電極に接続されるように形成する工程とを備え、
前記ゲート電極コンタクトを形成する工程は、前記第1犠牲層を除去した後に前記金属電極及び前記基板の上に誘電体層を形成すること、前記金属電極の幅よりも狭いコンタクト開口を前記金属電極にまで達するように該誘電体層に形成すること、及び、前記コンタクト開口に導電材料を充填することを含む、半導体素子の製造方法。 - 第2犠牲層を形成する工程は、窒化物を含む第2犠牲層を形成する工程を含む、請求項11記載の半導体素子の製造方法。
- 第2犠牲層を形成する工程は、金属を含む第2犠牲層を形成する工程を含む、請求項11記載の半導体素子の製造方法。
- スペーサを形成する工程は、金属電極及びゲート誘電体の合計高さの少なくとも2倍の高さを有するスペーサを形成する工程を含む、請求項11記載の半導体素子の製造方法。
- 金属電極を形成する工程は、2〜20ナノメートルの範囲の厚さを有する金属電極を形成する工程を含む、請求項11記載の半導体素子の製造方法。
- 第1犠牲層を形成する工程は、40〜100ナノメートルの範囲の厚さを有する第1犠牲層を形成する工程を含む、請求項11記載の半導体素子の製造方法。
- 第2犠牲層を形成する工程は、5〜40ナノメートルの範囲の厚さを有する第2犠牲層を形成する工程を含む、請求項11記載の半導体素子の製造方法。
- 第1犠牲層を除去する前に、かつ第2犠牲層を除去する前に、ソース/ドレイン領域を基板内に、ゲート誘電体の少なくとも一部分に隣接して、かつゲート誘電体の少なくとも一部分の下に形成する工程をさらに備える、請求項11記載の半導体素子の製造方法。
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US11/619,861 | 2007-01-04 | ||
US11/619,861 US7544595B2 (en) | 2007-01-04 | 2007-01-04 | Forming a semiconductor device having a metal electrode and structure thereof |
PCT/US2007/087687 WO2008085667A2 (en) | 2007-01-04 | 2007-12-15 | Forming a semiconductor device having a metal electrode and structure thereof |
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JP2010519724A JP2010519724A (ja) | 2010-06-03 |
JP5534407B2 true JP5534407B2 (ja) | 2014-07-02 |
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US (1) | US7544595B2 (ja) |
JP (1) | JP5534407B2 (ja) |
CN (1) | CN101743622B (ja) |
TW (1) | TWI455189B (ja) |
WO (1) | WO2008085667A2 (ja) |
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US7863123B2 (en) * | 2009-01-19 | 2011-01-04 | International Business Machines Corporation | Direct contact between high-κ/metal gate and wiring process flow |
KR20140089650A (ko) | 2013-01-03 | 2014-07-16 | 삼성디스플레이 주식회사 | 액정 표시 장치 및 그 제조 방법 |
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JPH02162738A (ja) * | 1988-12-15 | 1990-06-22 | Nec Corp | Mos fet の製造方法 |
US5168072A (en) * | 1990-10-12 | 1992-12-01 | Texas Instruments Incorporated | Method of fabricating an high-performance insulated-gate field-effect transistor |
JPH0521455A (ja) * | 1991-07-12 | 1993-01-29 | Nec Corp | 半導体集積回路装置の製造方法 |
JP3373954B2 (ja) * | 1994-10-20 | 2003-02-04 | 三菱電機株式会社 | 半導体装置の製造方法 |
KR960039434A (ko) * | 1995-04-21 | 1996-11-25 | 김광호 | 금속 게이트 전극을 갖는 트랜지스터 및 그 제조방법 |
US5573964A (en) * | 1995-11-17 | 1996-11-12 | International Business Machines Corporation | Method of making thin film transistor with a self-aligned bottom gate using diffusion from a dopant source layer |
US6225168B1 (en) * | 1998-06-04 | 2001-05-01 | Advanced Micro Devices, Inc. | Semiconductor device having metal gate electrode and titanium or tantalum nitride gate dielectric barrier layer and process of fabrication thereof |
US20050048732A1 (en) * | 2003-08-26 | 2005-03-03 | International Business Machines Corporation | Method to produce transistor having reduced gate height |
US7220635B2 (en) * | 2003-12-19 | 2007-05-22 | Intel Corporation | Method for making a semiconductor device with a metal gate electrode that is formed on an annealed high-k gate dielectric layer |
US20050151166A1 (en) * | 2004-01-09 | 2005-07-14 | Chun-Chieh Lin | Metal contact structure and method of manufacture |
JP4511212B2 (ja) * | 2004-02-20 | 2010-07-28 | Okiセミコンダクタ株式会社 | 半導体装置及びその製造方法 |
US6893927B1 (en) * | 2004-03-22 | 2005-05-17 | Intel Corporation | Method for making a semiconductor device with a metal gate electrode |
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- 2007-01-04 US US11/619,861 patent/US7544595B2/en active Active
- 2007-12-15 JP JP2009544874A patent/JP5534407B2/ja active Active
- 2007-12-15 CN CN2007800446006A patent/CN101743622B/zh active Active
- 2007-12-15 WO PCT/US2007/087687 patent/WO2008085667A2/en active Application Filing
- 2007-12-31 TW TW096151427A patent/TWI455189B/zh active
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US7544595B2 (en) | 2009-06-09 |
CN101743622A (zh) | 2010-06-16 |
TWI455189B (zh) | 2014-10-01 |
US20080164498A1 (en) | 2008-07-10 |
WO2008085667A3 (en) | 2010-04-08 |
JP2010519724A (ja) | 2010-06-03 |
CN101743622B (zh) | 2012-03-21 |
TW200837812A (en) | 2008-09-16 |
WO2008085667A2 (en) | 2008-07-17 |
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