JP5420409B2 - 銅とバリア層との間の接着性を向上させるための自己組織化原子層 - Google Patents
銅とバリア層との間の接着性を向上させるための自己組織化原子層 Download PDFInfo
- Publication number
- JP5420409B2 JP5420409B2 JP2009526618A JP2009526618A JP5420409B2 JP 5420409 B2 JP5420409 B2 JP 5420409B2 JP 2009526618 A JP2009526618 A JP 2009526618A JP 2009526618 A JP2009526618 A JP 2009526618A JP 5420409 B2 JP5420409 B2 JP 5420409B2
- Authority
- JP
- Japan
- Prior art keywords
- copper
- layer
- barrier layer
- integrated system
- metal barrier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
- C23C16/45525—Atomic layer deposition [ALD]
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
- C23C16/18—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metallo-organic compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
- H01L21/76856—After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Organic Chemistry (AREA)
- Metallurgy (AREA)
- General Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Plasma & Fusion (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/514,038 US8241701B2 (en) | 2005-08-31 | 2006-08-30 | Processes and systems for engineering a barrier surface for copper deposition |
| US11/514,038 | 2006-08-30 | ||
| US11/639,012 US20090304914A1 (en) | 2006-08-30 | 2006-12-13 | Self assembled monolayer for improving adhesion between copper and barrier layer |
| US11/639,012 | 2006-12-13 | ||
| PCT/US2007/018212 WO2008027205A2 (en) | 2006-08-30 | 2007-08-15 | Self assembled monolayer for improving adhesion between copper and barrier layer |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010503203A JP2010503203A (ja) | 2010-01-28 |
| JP2010503203A5 JP2010503203A5 (enExample) | 2012-04-26 |
| JP5420409B2 true JP5420409B2 (ja) | 2014-02-19 |
Family
ID=39136454
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009526618A Expired - Fee Related JP5420409B2 (ja) | 2006-08-30 | 2007-08-15 | 銅とバリア層との間の接着性を向上させるための自己組織化原子層 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US20090304914A1 (enExample) |
| JP (1) | JP5420409B2 (enExample) |
| KR (1) | KR101423349B1 (enExample) |
| MY (1) | MY162187A (enExample) |
| SG (1) | SG174105A1 (enExample) |
| TW (2) | TWI453822B (enExample) |
| WO (1) | WO2008027205A2 (enExample) |
Families Citing this family (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8916232B2 (en) * | 2006-08-30 | 2014-12-23 | Lam Research Corporation | Method for barrier interface preparation of copper interconnect |
| JP4755573B2 (ja) * | 2006-11-30 | 2011-08-24 | 東京応化工業株式会社 | 処理装置および処理方法、ならびに表面処理治具 |
| KR100841170B1 (ko) * | 2007-04-26 | 2008-06-24 | 삼성전자주식회사 | 저저항 금속 배선 형성방법, 금속 배선 구조 및 이를이용하는 표시장치 |
| JP4971078B2 (ja) * | 2007-08-30 | 2012-07-11 | 東京応化工業株式会社 | 表面処理装置 |
| KR101096031B1 (ko) | 2009-03-31 | 2011-12-19 | 한양대학교 산학협력단 | 자기조립단분자막 형성방법과 이를 이용한 반도체 소자의 구리배선 및 그의 형성방법 |
| US8415252B2 (en) * | 2010-01-07 | 2013-04-09 | International Business Machines Corporation | Selective copper encapsulation layer deposition |
| US9252049B2 (en) * | 2013-03-06 | 2016-02-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for forming interconnect structure that avoids via recess |
| US8962473B2 (en) | 2013-03-15 | 2015-02-24 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of forming hybrid diffusion barrier layer and semiconductor device thereof |
| KR102264160B1 (ko) | 2014-12-03 | 2021-06-11 | 삼성전자주식회사 | 비아 구조체 및 배선 구조체를 갖는 반도체 소자 제조 방법 |
| KR101816028B1 (ko) * | 2015-01-23 | 2018-01-08 | 코닝정밀소재 주식회사 | 금속 접합기판 |
| US9799593B1 (en) * | 2016-04-01 | 2017-10-24 | Intel Corporation | Semiconductor package substrate having an interfacial layer |
| US10358715B2 (en) * | 2016-06-03 | 2019-07-23 | Applied Materials, Inc. | Integrated cluster tool for selective area deposition |
| KR101819825B1 (ko) * | 2016-06-13 | 2018-01-18 | 아주대학교산학협력단 | 플렉시블 전극 제조방법 |
| US10573522B2 (en) | 2016-08-16 | 2020-02-25 | Lam Research Corporation | Method for preventing line bending during metal fill process |
| US9875958B1 (en) | 2016-11-09 | 2018-01-23 | International Business Machines Corporation | Trace/via hybrid structure and method of manufacture |
| US10163695B1 (en) * | 2017-06-27 | 2018-12-25 | Lam Research Corporation | Self-forming barrier process |
| US10678135B2 (en) | 2017-12-20 | 2020-06-09 | International Business Machines Corporation | Surface treatment of titanium containing hardmasks |
| JP2019192892A (ja) | 2018-04-18 | 2019-10-31 | 東京エレクトロン株式会社 | 処理システムおよび処理方法 |
| US10914008B2 (en) * | 2018-09-27 | 2021-02-09 | Imec Vzw | Method and solution for forming interconnects |
| KR102792797B1 (ko) | 2018-11-19 | 2025-04-07 | 램 리써치 코포레이션 | 텅스텐을 위한 몰리브덴 템플릿들 |
| US11076492B2 (en) * | 2018-12-17 | 2021-07-27 | Averatek Corporation | Three dimensional circuit formation |
| JP7581213B2 (ja) | 2019-01-28 | 2024-11-12 | ラム リサーチ コーポレーション | 金属膜の蒸着 |
| WO2021046058A1 (en) | 2019-09-03 | 2021-03-11 | Lam Research Corporation | Molybdenum deposition |
| JP2022551965A (ja) | 2019-10-15 | 2022-12-14 | ラム リサーチ コーポレーション | モリブデン充填 |
| US11929327B2 (en) | 2020-01-29 | 2024-03-12 | Taiwan Semiconductor Manufacturing Co., Inc. | Liner-free conductive structures with anchor points |
| DE102020119831B4 (de) | 2020-01-29 | 2024-11-14 | Taiwan Semiconductor Manufacturing Co., Ltd. | Verfahren und Struktur |
| KR20230104071A (ko) * | 2020-11-19 | 2023-07-07 | 램 리써치 코포레이션 | 저 저항률 (low resistivity) 콘택트들 및 상호 접속부들 |
| WO2024243143A1 (en) * | 2023-05-23 | 2024-11-28 | Lam Research Corporation | Inhibited atomic layer deposition in trench features |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4949671A (en) * | 1985-10-24 | 1990-08-21 | Texas Instruments Incorporated | Processing apparatus and method |
| JP3911643B2 (ja) * | 1995-07-05 | 2007-05-09 | 富士通株式会社 | 埋め込み導電層の形成方法 |
| US6042623A (en) * | 1998-01-12 | 2000-03-28 | Tokyo Electron Limited | Two-wafer loadlock wafer processing apparatus and loading and unloading method therefor |
| US6017820A (en) * | 1998-07-17 | 2000-01-25 | Cutek Research, Inc. | Integrated vacuum and plating cluster system |
| JP3974284B2 (ja) * | 1999-03-18 | 2007-09-12 | 株式会社東芝 | 半導体装置の製造方法 |
| US6734559B1 (en) * | 1999-09-17 | 2004-05-11 | Advanced Micro Devices, Inc. | Self-aligned semiconductor interconnect barrier and manufacturing method therefor |
| US6423636B1 (en) * | 1999-11-19 | 2002-07-23 | Applied Materials, Inc. | Process sequence for improved seed layer productivity and achieving 3mm edge exclusion for a copper metalization process on semiconductor wafer |
| AU2001255656A1 (en) * | 2000-04-25 | 2001-11-07 | Tokyo Electron Limited | Method of depositing metal film and metal deposition cluster tool including supercritical drying/cleaning module |
| US20040040504A1 (en) * | 2002-08-01 | 2004-03-04 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing apparatus |
| US20050274621A1 (en) * | 2004-06-10 | 2005-12-15 | Zhi-Wen Sun | Method of barrier layer surface treatment to enable direct copper plating on barrier metal |
| US20060033678A1 (en) * | 2004-01-26 | 2006-02-16 | Applied Materials, Inc. | Integrated electroless deposition system |
| US7309658B2 (en) * | 2004-11-22 | 2007-12-18 | Intermolecular, Inc. | Molecular self-assembly in substrate processing |
| KR100613388B1 (ko) * | 2004-12-23 | 2006-08-17 | 동부일렉트로닉스 주식회사 | 다마신법을 이용한 구리 배선층을 갖는 반도체 소자 및 그형성 방법 |
| KR100718804B1 (ko) * | 2005-11-15 | 2007-05-16 | 동부일렉트로닉스 주식회사 | 반도체 소자 및 그 제조 방법 |
| US8916232B2 (en) * | 2006-08-30 | 2014-12-23 | Lam Research Corporation | Method for barrier interface preparation of copper interconnect |
-
2006
- 2006-12-13 US US11/639,012 patent/US20090304914A1/en not_active Abandoned
-
2007
- 2007-08-15 SG SG2011062148A patent/SG174105A1/en unknown
- 2007-08-15 WO PCT/US2007/018212 patent/WO2008027205A2/en not_active Ceased
- 2007-08-15 KR KR1020097004315A patent/KR101423349B1/ko not_active Expired - Fee Related
- 2007-08-15 MY MYPI20090690A patent/MY162187A/en unknown
- 2007-08-15 JP JP2009526618A patent/JP5420409B2/ja not_active Expired - Fee Related
- 2007-08-29 TW TW101121357A patent/TWI453822B/zh not_active IP Right Cessation
- 2007-08-29 TW TW096131991A patent/TWI462178B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR101423349B1 (ko) | 2014-07-24 |
| TWI453822B (zh) | 2014-09-21 |
| WO2008027205A2 (en) | 2008-03-06 |
| MY162187A (en) | 2017-05-31 |
| TWI462178B (zh) | 2014-11-21 |
| JP2010503203A (ja) | 2010-01-28 |
| TW200834726A (en) | 2008-08-16 |
| KR20090045302A (ko) | 2009-05-07 |
| SG174105A1 (en) | 2011-09-29 |
| US20090304914A1 (en) | 2009-12-10 |
| WO2008027205A3 (en) | 2008-04-24 |
| TW201246376A (en) | 2012-11-16 |
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